2. Chap. 1 Introduction

3. What are Logic NVMs?
Can be fabricated concurrently with logic circuit function
No or few masks added
Used to store: program codes, security or identification codes, parameters for calibration or function settings.
Stand along or embedded NVM works, but……
Pin count ↓, board space ↓, interchip
connection↓, system cost↓

4. What are Logic NVMs? Commodity NVM ~ 10 masks added
Logic NVM: single-poly NVM process, design cycle↓, easy to implement, simple to transfer across CMOS process.

5. Which Logic NVM to use? How does it works?
Full compatibility with generic CMOS process
structural simplicity
low manufacturing cost
testability for manufacturing monitoring
flexible and customizable design for customer
products
Floating gte

6. When to use Logic NVMs

7. Why to use Logic NVMs Low mask countslow cost
Easy to transferwidespread production option
Security (single chip)

8. Where to get Logic NVMs?

9. How to use Logic NVMs?
OTP
EEPROM
MTP

10. Sec. 3.1 Device

16. Transimpedance amplifier
Transimpedance amplifier with a reverse biased photodiode
Simplified transimpedance amplifier

29. Sec. 3.2 Process Integration

30. 剖面圖

31. 記憶單元剖面結構
Select transistor memory transistor
Source Line

35. Why Shallow Trench Isolation
To prevent latch-up and isolate transistors from each other.

36. Why deep N-well Deep n-Well (DNW) is necessary to isolate each p-Well
from the high potential generated for programing and erasing by the pumping circuitry
Depletion region

37. High quality oxide grown by thermal dry oxidation
35 Å~ 40 Å
CVD deposition
In-situ steam generation (ISSG)
Thicker than tunneling oxide to prevent charge loss during retention

38. Poly Gate Formaton

39. Reverse ONO Etch This mask is used to tune the device performance
LDD implantation
This mask is used to tune the device performance

40. Sec. 3.3 Reliability

41. Time-Dependent Dielectric Breakdown

42. TDDB
Larger area quicker failure

43. Exponential decay
Linear scale log scale
100/e=36.8

44. Reliability
36.8% survive
population/e
lifetime of
exponential decay

45. 36.8% survive population/e lifetime of exponential decay
Lifetime 101.8=65(yrs)

46. Lifetime 101.8=65(yrs)
Cell lasts much longer than pumping circuit

47. Larger areahigher device counthigher failure ratelower lifetime