1. ITRS
Design

2. Design
Design for manufacturability
Design verification

3. Design for Manufacturability
Architecture challenges
Logic and circuit challenges
Layout and physical design challenges
Yield prediction and optimization

4. Variability Modeling and Roadmap – Need for Such a Roadmap
Expected to be the source of multiple DFM challenges
Invest in variability reduction or design productivity improvements?

5. Variability Modeling and Roadmap – Levels of Abstraction
Circuit/Chip level
Device level
Physical level

6. Design Verification
Verification vs testing
Moore’s law
Historical emphasis in design improvement

7. Design Verification – Challenges (>50nm)
Capacity
Robustness
Verification metrics
Software
Reuse
Specialized verification methodology
Specialized design-for-verifiability
New kinds of concurrency

8. Design Verification – Challenges (<50nm)
Design for verifiability
Higher levels of abstraction
Specification for verifiability
Verification in presence of non-digital effects
Heterogeneous systems
Analog-Mixed signal
Soft failures
Verification for redundancy