1. Progress Update
Henry Chen
December 17, 2010

2. Recap FPGA platforms for chip testing, algorithm emulation
Toolflow updated to Matlab 2007b + Xilinx 10.1
New Windows Server 2K8 compute machines
Matlab KATCP client

3. New Hardware 2 ROACHs 1 new IBOB v1.3 Total inventory:
{dmrc-1, dmrc-2}.ee.ucla.edu
1 new IBOB v1.3
Total inventory:
1x BEE2
2x ROACH
3x IBOB (1x v1.0, 2x v1.3)
(several XUPs, ML506, 3x Actel IGLOO eval boards)
dmrc-1
dmrc-2

4. Board Utilization Burst
Tested 7 chips in the last 6 months
3x FPGA (IBM90, TSMC65, ST65)
Osort
CR spectrum sensing
Flash ADC
DFE transmitter
Spike sorting exploration

5. Streaming-lite Long vector of low-rate spike data
8 bits x 16 channels x 24 kHz
Not enough data bandwidth; buffer & send
262MB (2096Mb) for ~10 mins recording
IBOB in-FPGA BRAM: 0.375MB (3Mb)
IBOB on-board SRAM: 4MB (32Mb)
ROACH in-FPGA BRAM : 0.95MB (7.6Mb)
ROACH on-board SRAM: 16MB (128Mb)
ROACH on-board DRAM: 1GB (8Gb)

6. The Catch No DRAM on IBOB  Use ROACH
No Z-DOKs on test board  Use GPIOs
No GPIOs on ROACH  Use IBOB

7. Ribbon Hell

8. spikedata2ibob ECC removal clk/valid generation output stage TVG
Double buffer w/ 128b to 16b reshaping

9. spikedata2ibob Double-buffers in BRAM to mask DRAM access
Dual-ported BRAM aspect ratio transformation maps 1024x128b into 8192x16b
In-circuit test vector generation
Outputs 16-bit samples at ~400kHz (200MHz/512)
Includes sample clock & data valid flag for capture
1015 kB/sec Matlab datarate even with w/ KATCP
57.5hrs to load 262MB vector

10. Wireless Neural Recording System w/ Vaibhav + Cheng

11. System Specifications
Prototype system to amplify and transmit multiple channels of EEG data
~1mV, 2 kHz input signals
8-bit ADC resolution
Up to 5 m wireless transmission
Allow reception and real-time plotting

12. System Assembly Built with off-the-shelf sections where possible
Sparkfun radio transceiver board w/ crystal, antenna, etc.
Actel FPGA eval board
mbed microcontroller board
Custom-built analog front-end prototype
Needed careful selection of parts for noise, power specs
Integrated board for filter, amp, mux, adc

13. FPGA Component Stitching

14. Results
Can achieve ~40 ksps sampling, ~400 kbps transmission in ~15mA total system current draw
Low-power Actel FPGA: V, V
15% utilization, 10MHz operation
Current (µA)

15. More Integration to Come…