1. Fundamentals of Computer Organisation & Architecture
Assembly Language

2. Assembly Language Basics
We’ve talked about assembly language before
When looking at translator programs
It acts as a form of stopgap between a human-readable programming languages and machine code
Any language is first converted into assembly language
Then it is assembled into machine code to be executed

3. Assembly Language Basics
All assembly instructions use the same syntax
First is the opcode: the operation to carry out
Then there are the operands: the parameters for the operation
Opcode
Operands
ADD R0 12

4. Assembly Language Basics
The most important thing to note about assembly language is that there are different versions of it
There isn’t one assembly language
The difference is based off the architecture of the computer
Intel x86 ARM
A good online Intel x86 assembler can be found online:

5. Intel x86: Registers
Intel x86 has a series of set registers we can make use of
We are free to use any of the general registers as needed
The ESP and EBP registers act as the SP and a backup of the SP

6. Intel x86: Registers
We can also access parts of the general-purpose registers
For example
EAX: 32 bits
AX: 16 bits
AH/AL: 8 bits
Changing any of the smaller blocks changes the larger block

7. Intel x86: ADD ADD EAX, 10 ADD [EAX], 10
Adds the two operands given, and stores the result in the first operand
A bite like += in other programming languages
Can address either a register or a memory address
ADD EAX, 10
ADD [EAX], 10

8. Intel x86: SUB SUB EAX, 10 Subtracts the second operand from the first
And stores the result in the first operand
Works like ADD
SUB EAX, 10

9. Intel x86: LOAD and STORE Not used in the strictest sense in Intel x86
As memory spaces are accessed using []
LOAD retrieves data from a memory address and stores it in a register
STORE takes data from a register and stores it in a memory address
Instead, Intel x86 uses LEA (Load Effective Address) to store a memory address in a register
Can then get that data by using [] on that register

10. Intel x86: Branching
There are two ways of adding branches to an assembly program
Unconditional: JMP
Conditional: JE, JNE, JL, JLE, JG, JGE, JZ
Assembly works by jumping from one location to another
Via labels
Can jump to any without checking anything using JMP
Great for jumping back to the start of a ‘loop’

11. Intel x86: Branching CMP EAX, EBX JEZ loop
If we want to add a conditional branch, we first need to compare two values
After the comparison, we can use the different jumps to go down different branches
CMP EAX, EBX
JEZ loop

12. Intel x86: Bitwise Operations
We also have access to all the bitwise operations
AND, OR, XOR, NOT, SHL, SHR
These are not logical operations
Act on the binary value of two operands
Result is another binary value stored in the first operand
AND EAX, EBX

13. Intel x86: Halt
We can also tell the processor to pause for a brief amount of time (or until a value has been returned by another part of the computer)
Using a halt command
The HLT operation
Makes the program wait until an interrupt is sent to the CPU
More on that later

14. Try making the following programs in Intel x86 Assembly
A program which stores a number in one register, and doubles that value
A program which stores a number in EAX. If that number is negative, it stores 0 in EBX. If that number is positive, it stores 1 in EBX.
A program which stores 1 in EAX. It then counts up to 10. As soon as it reaches 10, it stops.
A program which stores a number in EAX and EBX. It then multiplies these two numbers and stores the result in ECX.

15. Interrupts and ISRs
Interrupts are small events we can fire towards the processor
At either a software or hardware level
Software: the HLT command from before
Hardware: something changes in the graphics card, or an IO device
In response to this, the program the processor is currently dealing with pauses
And a different program is run
Called an Interrupt Service Routine

16. Interrupts and ISRs
Interrupts are small events we can fire towards the processor
At either a software or hardware level
Software: the HLT command from before
Hardware: something changes in the graphics card, or an IO device
In response to this, the program the processor is currently dealing with pauses
And a different program is run
Called an Interrupt Service Routine

17. Interrupts and ISRs
These interrupts can be sent from any number of locations, and have any number of priorities
So the CPU decides whether it stops what it’s doing any service the interrupt, or carry on and make the interrupt wait
These interrupts are registered, at the beginning of each Fetch-Execute Cycle, in a register
This register is then looked at

18. Interrupts and ISRs
These interrupts can be sent from any number of locations, and have any number of priorities
So the CPU decides whether it stops what it’s doing any service the interrupt, or carry on and make the interrupt wait
These interrupts are registered, at the beginning of each Fetch-Execute Cycle, in a register
This register is usually 0
This register is then looked at

19. Interrupts and ISRs
If this register is not 0, the CPU decides what it should do next (whether it interrupts or not)
If it does interrupt, it pushes all contents of the different registers onto a stack
When this interrupt has been completed, it comes back and pops the contents of this stack back onto the registers
Thus making a ‘backup’ of the volatile registers during an interrupt

20. Interrupts and ISRs
The CPU has different priorities to different interrupts
Hardware Failure: 1 (highest priority)
Program Error: 2
Timer: 3
I/O: 4 (smallest priority)
If multiple interrupts are registered, the CPU chooses the one with the highest priority