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Computers Internal Communication. Basic Computer System MAIN MEMORY ALUCNTL..... BUS CONTROLLER Processor I/O moduleInterconnections BUS Memory.

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Presentation on theme: "Computers Internal Communication. Basic Computer System MAIN MEMORY ALUCNTL..... BUS CONTROLLER Processor I/O moduleInterconnections BUS Memory."— Presentation transcript:

1 Computers Internal Communication

2 Basic Computer System MAIN MEMORY ALUCNTL..... BUS CONTROLLER Processor I/O moduleInterconnections BUS Memory

3 Local and Peripheral Bus

4 Bus Operation Transfer Quantity (word) Address bus Control bus Data bus Speed Clock speed

5 Controller PROCESSOR REGISTER BUFFER

6 Controller Operation PROCESSOR REGISTER BUFFER VALUE PROCESSOR BUFFERHEADERCRC PROCESSOR BUFFER CRC CPU passes parameters into the registers Controller transfers data into the card bufferCard processor checks the CRCData is transferred from the buffer to the bus

7 I/O Operations For the I/O device to communicate with the CPU, the designer includes additional registers in the CPU. I/O Address Register contains address of I/O device I/O Buffer Register contains the value to be transferred to/from the I/O device

8 I/O Registers IR 300PC CONTROL ARITHMETIC-LOGIC ACCUM PROGRAM 1940 5941 2941 300 301 302 DATA 0003 0002 940 941 I/O Address I/O Buffer

9 I/O Processing Programmed I/O Control Test Read/Write Interrupt Driven I/O Direct Memory Access

10 1. Programmed I/O Issue an I/O request CPU is tied up checking the I/O device until the response is ready. Solution: Interrupt Processing Wait until I/O finished Continue program

11 2. Interrupt Processing Issue an I/O request Store program parameters Start another process Process interrupt Return to original process

12 3. DMA Processor issues a request, then Goes about its business DMA module transfers the data, then Tells the processor

13 Programmed I/O Issue an I/O request CPU is tied up checking the I/O device until the response is ready. Solution: Interrupt Processing Wait until I/O finished Continue program

14 Interrupt Processing

15

16 Start FETCHEXECUTE Halt CHECK INTERRUPT

17 Interrupt Processing Issue an I/O request Store program parameters Start another process Process interrupt Return to original process

18 Classes of Interrupts Program: illegal program operations Timer: scheduled special operations I/O: device controller signals completion of operations or error Hardware Failure: power failure, memory parity error, etc.

19 Interrupt Request (IRQ) Registers IR 300PC CONTROL ARITHMETIC- LOGIC ACCUM PROGRAM 1940 5941 2941 300 301 302 DATA 0003 0002 940 941 I/O Address I/O Buffer IRQ Stack Addr.

20 Basic CPU Operation Start FETCH EXECUTE Halt INTERRUPT PROCESS

21 Interrupt Stack Add a CPU register: stack pointer. Recognize interrupt Store register contents (push stack) Process interrupt Restore register contents (pop stack) STACK PROGRAM COUNTER INSTRUCTION REGISTER ACCUMULATOR Etc. Base Address May also contain interim program values

22 Data Transfer: Interrupt Driven I/O MAIN MEMORY BUFFER CPU TAAD CONTROLLER DASD CPU

23 Data Transfer: Direct Memory Access MAIN MEMORY BUFFER CPU TAAD DASD CONTROLLER


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