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Information Storage and Spintronics 11
Atsufumi Hirohata Department of Electronic Engineering 15:00 Monday, 05/November/2018 (J/Q 004)
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Quick Review over the Last Lecture
DRAM : Read-out operation of 1C1T : Data stored in a capacitor. “1”-data : 1 V + ΔV = 2 V Electric charge needs to be refreshed. DRAM requires large power consumption. 3.6 V ON 2 V = 1 V + ΔV Refresh operation of 1C1T : “0”-data : 1 V – ΔV = 0 V 3.6 V ON 0 V = 1 V – ΔV * *
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11 Static Random Access Memory
Volatile memory developmement 6T-SRAM architecture Read / write operation 1T-SRAM Various ROMs
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Memory Types Rewritable Volatile Dynamic DRAM Static SRAM Non-volatile
MRAM FeRAM PRAM Read only Non-volatile Static PROM Mask ROM Read majority (Writable) Non-volatile Static Flash EPROM * 4
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Manchester Automatic Digital Machine
In 1949, Frederic C. Williams and Tom Kilburn developed Manchester Mark 1 : One of the earliest stored-programme computers * ** 5
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Williams-Kilburn Tube
Cathode-ray tube to store data : Utilise a minor change of electron charges at a fluorescent screen when an electron hit it. * 6
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Delay Line Memory In 1947, John P. Eckart invented a mercury delay line memory : Utilise an ultrasonic wave generated by a transducer to store a data. * 7
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An array of cathode-ray tubes is used to store data electrostatically.
Selectron Tube In 1953, Jan A. Rajchman (RCA) invented a selectron tube : An array of cathode-ray tubes is used to store data electrostatically. * ** 8
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Static Random Access Memory (SRAM)
No need to dynamically refresh data. Even so, the data is lost once the power is off. Flip flop is used to store data. Low power consumption * 9
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6T-SRAM Read Operation A standard SRAM cell :
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6T-SRAM Write Operation
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1T-SRAM Pseudo SRAM developed by MoSys :
By comparing with the conventional 6T-SRAM, < 1/3 area < 1/2 power consumption Easy to be embeded Simple interface Similar to SRAM performance Lower latency as compared with DRAM High fidelity (< 1 FIT / Mbit, FIT : failure in time of 10 9 hours) * ** 12
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Advantages of 1T-SRAM Comparison between 1T-SRAM, embedded SRAM (eSRAM) and 6T-SRAM : * 13
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Mask ROM Read-only memory made by a photo-mask : Cheap
Simple structure Ideal for integration Initial mask fabrication cost Lead time for mask fabrication No design change without mask replacement * 14
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Programmable ROM (PROM)
PROM bipolar cell : * 15
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PROM Architecture PROM architecture :
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Erasable PROM UV-light can erase stored data :
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Electrically EPROM (EEPROM)
In 1978, George Perlegos (Intel) developed electrical erasing mechanism : Similar to flash memory Individual bits are erasable. Rewritable by simply writing a new data Rewritability > 100k times Small capacity (~ a few 10 bytes) More complicated architecture as compared with flash memory Higher cost for fabrication as compared with flash memory * 18
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EEPROM Usages EEPROM is used in various applications :
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Connections between the Components
Connections between CPU, in/outputs and storages : *
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