1. Developing a multi-thread product -- Introduction
M. Smith
Electrical Engineering, University of Calgary
ucalgary.ca
11/24/2018

2. References
Understanding GPS Principles and Applications, 1996, Elliott D. Kaplan
Digital Signal Processing – A Practical Approach, 1993, Emmanuel C. Ifeachor, Barrie W. Jervis
ADSP-TS101 TigerSHARC and Blackfin Processor Programming References, Analog Devices
Articles submitted to Circuit Cellar magazine by M. Smith, March 2004
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3. Introduction GPS traditionally done with ASIC/Processor combination
Looking at FPGA/DSP combination for low end GPS receivers
Technological interest in software radio
Cheaper, quicker development cycle.
Customizations for special applications
From a talk by Darrell Anklovitch for ENEL619.23
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4. What is GPS? Global Positioning System 24 satellite (SV) constellation
Orbiting 20,000 km from the surface of the Earth in 12 hour cycles
Orbits are set-up to give global coverage
24 hours a day
Need at least 4 satellites in view to calculate a position
(1)
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5. GPS Positioning Concepts
(1)
For now make 2 assumptions:
We know the distance to each satellite
We know where each satellite is
Require 3 satellites for a 3-D position in this “ideal” scenario
Requires 4 satellites to account for local receiver clock drift.
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6. GPS Signal Structure
Each satellite transmits 2 carrier frequencies referred to as L1 (1575 MHz) and L2 (1227 MHz)
Each carrier frequency is BPSK modulated with a unique PRN (pseudo random number) code
The PRN code on L1 is called CA code (coarse acquisition), The PRN code on L2 is called P code (precise)
CA code takes 1 ms for full PRN transmission at 1MHz chip (bit) rate. P code takes 1.5 s for full PRN transmission at ~10MHz chip rate
Also modulated on each carrier is 50 Hz data that includes the current position of the satellite
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7. Determining Time Use the PRN code to determine time
(1)
Use the PRN code to determine time
Use time to determine distance to the satellite distance = speed of light * time
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8. Algorithms to Find PRN Phase
Time-domain Cross correlation: 1/N ∑ x1 (n) * x2(n)
Coding equivalent to FIR filter, but need to filter N sets of data, each shifted by one data point – looks like a final exam question to me.
Correlation of perfectly matching signals gives a maximum value
Correlation of 2 random data sequences tends to 0
PRN code from different satellites are designed to correlate to 0.
Frequency domain correlation: 1/N F-1[X1(k)X2(k)] where F-1 is the inverse Discrete Fourier Transform and the X’s are the Discrete Fourier Transforms of two sequences D
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9. Timing Frequency Domain 1/N F-1[X1(k)X2(k)]
1024 point FFT (2 * NLOG2N)
1024 MULTS (N)
1024 point INV FFT (NLOG2N)
Time Domain 1/N ∑ x1 (n) * x2(n)
n = 0
1024 MACs (N)
1024 Phases (N)
30,000
Complex
operations
N-1
1,048,576
operations
(N2)
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10. TigerSHARC -- TS101 and TS201 TS101 TS201 Low-cost version $45 / chip
Evaluation boards $950 each educational price
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11. Implementing a multi-thread system working on batch data
Collect N 44 kHz  array1
Collect N 44 kHz  array2
Collect N 44 kHz  array3
Process array1
Process array2
Process array3
Process array4
Transmit N 44 kHz  array1
Transmit N 44 kHz  array2
Transmit N 44 kHz  array3
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12. Implementing a multi-thread system -- Laboratory 5 concepts
Collect N 44 kHz  array1
Collect N 44 kHz  array2
Collect N 44 kHz  array3
Move array1  array4 SimulateComplex
Move array2  array5 SimulateComplex
Move array3  array6 SimulateComplex
Transmit N 44 kHz  array4
Transmit N 44 kHz  array5
Transmit N 44 kHz  array6
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13. Essentially Take an audio Talk-through program
for loop {
Read_a_sample; Perform operation; Write_a_sample; }
Turn into 5-threads running under interrupts
Idle thread
Initialization thread – sets up system, when ready – launches the other threads – then activates the first thread
ReadValueThread,
ProcessValueThread – with simulated Complex Algorithm
WriteValueThread
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14. Initialization Thread – Lab. 5 early
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15. Main Threads – example – Lab. 5 early
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16. Need to investigate and understand system behaviour and limitations
Concept of task priority
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17. Lab. 5 – using real-time audio-test
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18. VDK – Status History
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19. Laboratory 5 – Done in “C and C++”
Stage 1 – 30%
Develop and investigate a multi-tasking system where the threads are free-running. Thread tasks are “Sleep(time_task)”
Develop and investigate a multi-tasking system where the threads communicate through semaphores to control order of operation
Stage 2 – 55%
Demonstrate and investigate turning an “audio – talk-through program” into a multi-threaded system – one point processed per interrupt
Stage 3 – 15%
Demonstrate a batch processing system as a multi-threaded system
Options
Use SHARC ADSP boards (40 MHz) – existing audio-libraries – have not attempted
Use Blackfin ADSP-BF533 boards (600 MHz) – existing audio-libraries – have been successful at home, but not here
Use Blackfin ADSP-BF533 boards (600 MHz) – using very simple, no frills, audio-talk though library – surprising simple with 1 to 32 points being processed. Fails with 33 points. Code logic issue, not a timing issue as I can waste cycles per block at 32 points
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20. Where to start?
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21. Adding the Initialization thread
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22. Making the InitializationThread a “Boot Thread”
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23. Add the thread programming control
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24. Avoid the free-running code
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25. Then add semaphores to control flow
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26. Tackled today GPS basic concepts
Algorithm can be implemented in either time-domain or frequency domain
Big time advantages in frequency domain for the GPS algorithm (unless add special instructions)
Need to batch data for input, output and processing
VDK is an Analog Devices VisualDSP++Tool for automatically generating the code for a multi-threaded system
Laboratory 5 – First part 30%
Implement a simple multi-threaded system where the threads mainly sleep, and either free run, or communicate through semaphores to control program flow
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