1. This presentation will probably involve audience discussion, which will create action items. Use PowerPoint to keep track of these action items during your presentation In Slide Show, click on the right mouse button Select “Meeting Minder” Select the “Action Items” tab Type in action items as they come up Click OK to dismiss this box This will automatically create an Action Item slide at the end of your presentation with your points entered. SHARC Processor Characteristics Number Representations When 1 + 1 = 2 BUT 2 *2 != 4 M. R. Smith, Electrical and Computer Engineering University of Calgary, Alberta, Canada smithmr @ ucalgary.ca

2. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 2 / 28 To tackled zNumber Representations are varied zMake sure you understand them zCan solve many coding errors by recognizing improper use of number representations zSHARC default number representation for integers is not what is expected. zUnderstanding Number Representations allows for extra speed in that 1 in 1000 situation

3. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 3 / 28 Number Representations zNumber representations are important. zThis is a talk about the number representations on the Analog Devices ADSP-21061 SHARC yProcessor has “C-like” syntax for assembly code yBoth single cycle integer and float operations y32-bit registers (integer and float) zFor more information see the article Smith, M. R., "Quirks and SHARCs -- Issues in programming the Analog Devices SHARC processor. When 1 + 1 = 2 but 2 + 2 != 4", Circuit Cellar, March 2001.

4. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 4 / 28 Recap -- Bit patterns in memory zBit values stored in memory yCan represent what you like yhash table, ascii characters, signed and unsigned integer numbers (various precisions), floating point numbers etc. zCertain number representations more easily supported by the processor for various operations than others. zOn SHARC -- 32 bit integers and FP, also 40-bit FP (extended FP).

5. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 5 / 28 Example -- Eight Bit Values zUnsigned 8-bit integers yRange 0 -- 255, resolution 1 ye.g. 0x00 = 0, 0x10 = 16, 0x7F = 127 y0x80 = 128, 0x81 = 129, 0x90 = ????, 0xC0 = ???? y0xF0 = ????, 0xFE = 254, 0xFF = 255 zSigned 8-bit integers -- 2’s complement yRange -128 to + 127, resolution 1 ye.g. 0x00 = 0, 0x10 = +16, 0x7F = +127 y0x80 = -128, 0x81 = -128 + 1 = -127, 0x90 = ??? y0xF0 = ????, 0xFE = -2, 0xFF = -1

6. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 6 / 28 Floating Point in Binary Representation 20 (decimal) = 0x14 hex = %0001 0100 (binary) = %0001 0100. 0000 0000 0000 Normalize binary -- express as %1.frac * 2 N %0001 0100. 0000 0000 0000 = %1.0100 0000 0000 * 2 4 6 = %0110. 0000 0000 = %1.1000 0000 0000 * 2 2 Sign = 0 Fraction part = 0.1000 0000 0000 Biased Exponent 2 + 127 = 129 = %1000 0001 Stored as FP Number0 1000 0001 1000 0000 0000 etc 0x40C0 0000 = 0100 0000 1100 0000 0000 000

7. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 7 / 28 Display Program Code -- Float 32-bit registers

8. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 8 / 28 Code displayed in Mixed Mode 32 bit registers 40 bit display Ultra High precision FP Note how FP looks like VERY LARGE integer No such instruction as F4 = Only R4 = WARNING --- F4 = 2 is the same as R4 = 2 and is DIFFERENT F4 = 2.0

9. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 9 / 28 Need to learn to recognize zWhat do “integers” look like when they are displayed as “floats” zWhat do “floats” look like when displayed as “integers” yHappens when you pass a pointer to the start of an array and then treat the array incorrectly zI consider the following a BUG IN ASSEMBLER yF4 = 6 is actually the same as F4 = 3 * 10 -45 yFN = value does not exist -- only RN = value yMake sure that you add the decimal point!!!! y.byte4 array_of_FLOATS[] = { 2.8, 3, 3.2, 3.4}; NOT INTENDED AS A VERY SMALL VALUE

10. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 10 / 28 Display Program Code -- Integer 32 BIT registers Note how integers look like VERY SMALL floats -- note integer has wrong values – 2 * 3 = 0 Top 32 bits means something

11. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 11 / 28 Unexpected default integer representation z68k processor yDefault operations ySigned and unsigned integer representation z21k processor / Blackfin / TigerSHARC yDefault operations ySigned and unsigned integer representation of “fractional” values ySigned and unsigned integer “need to be switched on” zSee difference in multiplication

12. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 12 / 28 Code displayed in Mixed Mode Q9 – What happens with Blackfin

13. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 13 / 28 Proper Integer Coding sequence

14. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 14 / 28 Bit meaning in 8-bit signed fractional number ^ ACTS AS IF “BINARY POINT” HERE Binary Pattern %1001 0011 = -1 * 2 -0 + 0*2 -1 + 0*2 -2 + 1* 2 -3 + 0* 2 -4 + 0* 2 -5 + 1* 2 -6 + 1* 2 -7 Decimal Calculation = ( 0x93 / 128) = ( 0x80 + 0x13 ) / 128 = ( -128 + 19 ) / 128 = -1 + 19 / 128

15. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 15 / 28 Signed fractional zInteger interpreted with a binary point just after the sign bit zUsing 32-bit values zSmallest value -1.0 zLargest almost = + 1.0 = 1.0 - 2^-31 zSteps (accuracy)2^-31

16. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 16 / 28 68k equivalence -- 8-bit example zStandard number format yRange -128 to + 127, resolution 1 y0x0A+ 0x01 = 0x0B y%00001010 + %00000001 = %00001011 zIn any given DSP algorithm it could be useful to scale input values so that we have an alternative number format where binary point is effectively placed between bit #3 and #4 yRange -8 to 7 7/8, resolution 1/8 y0xA0 + 0x10 = 0xB0 (Means 0xA.0, 0x1.0, 0xB.0) y%1010.0000 + %0001.0000 = %1011.0000 zAddition supported in both number formats

17. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 17 / 28 68k equivalence -- 8-bit example zStandard number format yRange -128 to + 127, resolution 1 y0x0A * 0x01 = 0x0A y%00001010 * %00000001 = %00001010 zAlternative number format where binary point is placed between bit #3 and #4 yRange -8 to 7 7/8, resolution 1/8 y0xA.0 * 0x1.0 = 0x?? y%10100000 * %00010000 = %101000000000 zMust now adjust by >> 8 to get correct answer. When SHARC in SSF format, the scaling occurs automatically

18. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 18 / 28 Equivalent decimal calculation zAs done in grade 6 y-0.75 * 0.125 yPerform 75 * 125 then adjust for 5 decimal places. y-9375 then adjust to give -0.09375 z68k multiplication was y0xA.0 * 0x1.0 yPerform 0xA0 * 0x10 then adjust for hex places y0xA00 then adjust to give 0xA.00

19. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 19 / 28 Displayed as “signed fractional”

20. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 20 / 28 SHARC DIVISION APPEARS WEIRD TOO

21. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 21 / 28 Actual SHARC division operations Note the parallel instructions

22. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 22 / 28 Division is slow zInteger division on 68K -- 70 cycles y60000 / 3 takes 70 cycles y60000 / 2 takes 70 cycles zInteger shift takes much less y60000 / 2 = 60000 >> 1 yASR #1, D0 (with D0 = 60000) takes 4 cycles y21061 -- ASHIFT D0 BY -1 takes 1 cycle zCan we find an equivalent operation for floating point scaling (by 2, 4, 8, 16 etc.)?

23. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 23 / 28 Signed Fractional -- ASHIFT of integer Works here but that’s cheating since SF format is an floating point interpretation of an integer format

24. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 24 / 28 SIGN BIT Binary Pattern of TRUE floats EXPONENT BITS FRACTIONAL BITS Floating point division is often SLOW DIVIDE BY 2, 4, 8, 16 fast with integers CAN ALSO MAKE FAST WITH FLOATS If you understand number representations

25. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 25 / 28 Fast scaling -- Floats as Integers Differ in BEXP by 2 Differ in value by 4.0

26. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 26 / 28 Complete Fast Scaling

27. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 27 / 28 Nothing but a party trick! F8 = 0.0625; F0 = 4.0; F1 = F0 * F8; F2 = 2.0; F3 = F3 * F8; F4 = 0.0; F5 = F4 * F8; Since this processor has single cycle multiply operation R8 = -4; F0 = 4.0; F1 = SCALEB F0 BY R8; F2 = 2.0; F3 = SCALEB F2 BY R8; F4 = 0.0; F5 = SCALEB F4 BY R8; Works just like our code Advantage – this is a COMPUTE operation and NOT a MAC operation

28. 4/17/2015 Number Representations -- SHARC ADSP21061 Copyright M. Smith -- smithmr@ucalgary,ca 28 / 28 Learnt today zNumber Representations are varied zMake sure you understand them zCan solve many coding errors by recognizing improper use of number representations -- Limitation in SHARC assembler for F4 = zSigned Fractional is default SHARC integer representation zUnderstanding Number Representations allows for that 1 in 1000 situation when somebody at a party likes to play with DSP processors.