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Next generation 3D digital SiPM for precise timing resolution
Jean-François Pratte F Nolet, W. Lemaire, F. Dubois, N. Roy, S. G. Carrier, A. Samson, G. St-Hilaire, S. A. Charlebois, R. Fontaine Interdisciplinary Institute for Technological Innovation (3IT), Université de Sherbrooke 14th Frontier Detectors for Frontier Physics 2018
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Introduction Time of flight for PET
Stop Time-to-digital converter Δ time = Δ distance Patient PET Scanner + - Start 10 ps coincidence timing resolution (CTR) => 1.5 mm of precision
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SNR gain as a function of the Coincidence Timing Resolution
In our case, a 10 ps CTR would represent a CNR gain of >10 in the image Could lead to real time imaging in PET Many challenges: Scintillator with prompt photons Photodetectors and electronics with 10 ps SPTR (Single Photon Timing Resolution) P.Lecoq, 2017, IEEE TRPMS
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Single Photon Avalanche Diode (SPAD) Operation Cycle
3: Recharge A C 2 1: Trigger 3 1 2: Quenching B Excellent single photon timing resolution Sensitivity – single photon counting Silicon mass production low cost
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to digitize the data… again!
Analog Versus Digital SiPM… a Paradigm Shift… Bottom line, with an analog SiPM we sum binary detectors (an array of SPAD) to get a linear response… Then, use a current/transimpedance amplifier + shaper + ADC to digitize the data… again! How to take advantage of the SPAD’s digital nature? Can power consumption be saved using a digital approach compared to the classic analog readout dealing with large input capacitance of the serial / parallel connections of SiPM?
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Benefits of Digital SiPM for TOF-PET
2D Digital SiPM Advantages 1 TDC per SPAD Uniform SPTR per pixel SPAD to SPAD skew correction Cons of 2D implementation Low fill factor Same process for SPAD and CMOS No room for digital signal processing
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Sherbrooke’s 1st Generation 3D digital SiPM
CMOS readout: Teledyne-DALSA 0.8 µm HV SPAD: Modified CMOS process
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Next Generation 3D Digital SiPM with CMOS 65 nm readout
3D Integration High fill factor Heterogeneous technologies integration: SPAD array: Teledyne-Dalsa custom process TSMC CMOS 65 nm SPAD readout ASIC
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3D Digital SiPM readout architecture
QC TDC SPAD Pixel QC TDC SPAD Pixel 256 pixels Informations per packet: Pixel address Timing of the first photon detected Photon count over period of time Array trigger modes: Time driven Camera mode: timing of the first photon + photon count at a fixed time rate Event trigger (i-e: TOF-PET) X columns must trigger to detect an event Timing of the first photon + photon count for a programmable time window QC TDC SPAD Pixel QC TDC SPAD Pixel Array Readout A) Calibration and correction B) Timestamp sorting C) Dark count filter D) Multi-photon estimation
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Pixel overview 65 µm Circuit Power consumption (µW) Area (µm2)
3D bonding and ESD clearance - 950 QC 180 740 TDC 160 1000 Energy counter 5 80 Follower (x4) 88 400 Space available for digital circuit 1100 Pixel 443 4225
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On-chip digital signal processing– Raw Data
256 pixels QC TDC SPAD Channel 1st Mode of data transmission Raw data information Raw data (address, timestamp, count) Corrected raw data TDC LSB correction (look-up table) Skew correction (look-up table) Measured bandwidth 14 kcps for 1.1 × 1.1 mm2 Out 1 Array Readout Global Counter 1) Raw data Out 2 2) Calibration and correction “TDC LSB correction” = Measure the full ASIC LSB dispersion Put back in look up table the measured LSB 3) Timestamp sorting 4) Dark count filter 5) Multi-photon estimation
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On-chip digital signal processing – Processed Data
256 pixels QC TDC SPAD Channel 2nd Mode of data transmission Multi-photon time estimator based on BLUE (Best linear unbiased estimator) Sort the 32 first timestamp Filter dark count Output is: Timing information of 32 pixels combined Energy (counts) sum of 256 pixels Measured bandwidth 0.5 Mcps for 1.1 × 1.1 mm2 Array Readout Global Counter 1) Raw data 2) Calibration and correction DC filter: programmable ps to ns 3) Timestamp sorting 4) Dark count filter 5) Multi-photon estimation Out 5
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What are the measured contribution to the SPTR ?
Timing jitter contribution within the array What are the measured contribution to the SPTR ? Timing jitter SPAD QC TDC Array level contribution Noise between pixel TDC LSB non-uniformities Pixel-to-pixel skew N/A since the digital SiPM is not yet integrated in 3D < 3 ps rms with a pulse generator at its input 8 ps rms for a TDC LSB of 15 ps
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Timing Skew and Jitter – Array level Measurements
Skew contribution: clock tree, trigger tree, pixel mismatch Skew max of 500 ps within 1.1 × 1.1 mm2 Total Jitter is 87 ps rms
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Timing jitter – Array level
Since each pixel address is known, it can be characterize and corrected Skew corrected (1 ps max skew) Total Jitter is 18 ps rms
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Impact of the number of active TDC on the jitter
What’s in the ASIC Triple well isolation Separated power supplies for TDC – QC – digital core Analog buffer in each pixel The jitter worsen from 2 ps to 5 ps For 256 TDC The jitter worsen of ~1 ps For 1 to 64 TDC (less common noise)
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BLUE - preliminary results with on-chip readout
Simulation with Geant4 for LYSO (1×1×3 mm3) scintillator statistic Load parameter in Cadence to see the impact in Simulation Load the parameter in the ASIC and see the impact of the TDC jitter and the post-processing Difference = Higher TDC jitter Simulation Measurement
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Conclusion We developed Digital SiPM readout in CMOS 65 nm for Time-of-Flight Measurements with one QC and one TDC per pixel With the implemented correction circuit, the timing jitter is 18 ps rms, close to our objective to 10 ps array wide. We are currently correcting the analog buffer and ring oscillator Each step of the on-chip digital processing are fully functional Next revision focus 4 : 1 TDC Non-uniformities correction Power optimization Calibration system
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Conclusion 3D digital SiPM is a versatile technology.
A 3D digital SiPM is currently under development for LAr and LXe experiments We are member of the nEXO collaboration for double beta decays neutrinoless Next generation hundred tons LAr
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Acknowledgements Thank you for your attention
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Back-up slides
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Digital SiPM Overview 256 Pixels Out 1 Out 2 Post-processing Out 3
QC TDC SPAD Channel QC TDC SPAD Channel 256 Pixels QC TDC SPAD Channel QC TDC SPAD Channel Array Readout Out 1 A) Calibration and correction Out 2 Post-processing B) Timestamp sorting Out 3 C) Dark count filter Out 4 D) Multi-photon estimation Out 5
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Dark count filter PLL (x2) Multiple windows filter Dark noise Event
Array Readout PLL (x2) Multiple windows filter Global Counter 1) Raw data 2) Calibration and correction 3) Timestamp sorting Dark noise Event 4) Dark count filter 5) Multi-photon estimation
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3D digital SiPM Analog Monitor for Physicist
Transimpedance + of 484 channels
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