1. Created by Tim Green, Art Kay Presented by Peggy Liska
The Math Behind the R-C Component Selection TIPL TI Precision Labs – ADCs
Hello, and welcome to the TI Precision Lab covering component selection for SAR ADCs. In this video we cover the mathematical algorithm used in the SAR drive calculator used to select the R and C values in the charge bucket.
Created by Tim Green, Art Kay
Presented by Peggy Liska

2. Agenda SAR Operation Overview Select the data converter
Use the Calculator to find amplifier and RC filter
Find the Op Amp
Verify the Op Amp Model
Building the SAR Model
Refine the Rfilt and Cfilt values
Final simulations
Measured Results
SAR Drive Calculator Algorithm
This video goes into the math behind the SAR Drive Calculator used in step three of the process for selecting the external components for a SAR ADC.

3. Concept behind the math
Assumptions based on multiple designs
Vin = Full Scale
½ of Qsh is from Cfilt & ½ from Op Amp
100mV Droop – small signal response
Error target = 0.5∙LSB
Op amp approximated as second order system
Op amp four times faster than filter
In this section we will cover the mathematical algorithm used in the calculator to find the amplifier bandwidth as well as the range for the RC circuit. Before going through the derivations, we will introduce the overall assumptions and objective of the algorithm. The assumptions are based on measured and simulated results from multiple designs. There is a significant amount of technical literature covering the selection on the amplifier and RC charge bucket circuit, and most of this literature will use similar approaches. We believe that this approach combines the best aspects of these methods and provides a more methodical way to optimize the circuit.
One assumption is that the input is a full scale input. This will have worst case settling. Another assumption is that half of the charge for the sample and hold capacitor is delivered from the amplifier and half is from the external charge bucket capacitor. Also, the droop after the acquisition switch is closed is assumed to be 100mV. The error target here is on half of an LSB, and the amplifier RC circuit is assumed to be a second order system. Finally, we assume that the amplifier is four times faster than the RC charge bucket circuit.
Many of these assumptions are based on observation for many measured and simulated circuits. The assumptions aren’t perfect, and will not always be completely accurate; however, they will allow us to develop a set of equations that provide component values for SPICE optimization.

4. Cfilt Selection 𝑄 𝑠ℎ = 𝑉 𝐹𝑆𝑅 ∙ 𝐶 𝑠ℎ (1)
Total Charge in Csh and the end of acquisition period.
𝑄 𝑠ℎ = 𝑄 𝑓𝑟𝑚𝑂𝑝𝑎 + 𝑄 𝑓𝑟𝑚𝐶𝑓𝑖𝑙𝑡
(2)
Charge is from amplifier and filter capacitor
∆𝑄 𝐶𝑓𝑖𝑙𝑡 = 0.5∙𝑄 𝑠ℎ
(3)
Half the sample and hold charge (Qsh) is delivered from the filter. This results in a change in the charge on Cfilt.
∆𝑄 𝐶𝑓𝑖𝑙𝑡 =0.5∙ 𝑉 𝐹𝑆𝑅 ∙ 𝐶 𝑠ℎ
(4)
From (1), and (3)
∆𝑄 𝐶𝑓𝑖𝑙𝑡 = Δ𝑉 𝑓𝑖𝑙𝑡 ∙ 𝐶 𝑓𝑖𝑙𝑡
(5)
The change in charge on Cfilt will cause a droop in voltage. ΔVfilt
𝐶 𝑓𝑖𝑙𝑡 = 0.5∙ 𝑉 𝐹𝑆𝑅 Δ𝑉 𝑓𝑖𝑙𝑡 𝐶 𝑠ℎ
(6)
From (4), and (5). This is the general relationship for scaling Cfilt, given a droop in filter voltage (Vfilt)
First lets determine how to select the external charge bucket capacitor, Cfilt. Equation 1 is the standard equation for capacitor charge applied at the end of the acquisition period, that is charge on Csh is the full scale voltage times the sample and hold capacitance. Equation 2 let’s us know that the total charge delivered to the internal sample and hold is from the amplifier and the filter capacitor. Equation 3 indicates that half of the charge delivered to the internal sample and hold capacitor is from the external filter. Equation 4 combines equations 1 and 2. Equation 5 applies the general relationship for charge so that we can consider the droop in filter voltage. Equation 6 combines equation 4 and 5. Now we have a general equation for the filter capacitance based on the internal sample and hold capacitance. In the next slide we will simplify this this equation by applying specific conditions to it.

5. Cfilt Scaling Continued
𝐶 𝑓𝑖𝑙𝑡 = 0.5∙ 𝑉 𝐹𝑆𝑅 Δ𝑉 𝑓𝑖𝑙𝑡 𝐶 𝑠ℎ
(6)
From previous slide:
This is the general relationship for scaling Cfilt, given a droop in filter voltage (Vfilt).
Assume
VFSR = 4V, ΔVfilt=100mV
𝑪 𝒇𝒊𝒍𝒕 =𝟐𝟎∙ 𝑪 𝒔𝒉
(7)
Typical value for Cfilt
𝐶 𝑓𝑖𝑙𝑡 =30∙ 𝐶 𝑠ℎ
(8)
Maximum value for Cfilt
𝐶 𝑓𝑖𝑙𝑡 =10∙ 𝐶 𝑠ℎ
(9)
Minimum value for Cfilt
Here again we repeat the general equation relating Cfilt to Csh. Next we make some assumptions for a typical ADC system. That is, the full scale range is 4V and the droop on the external filter capacitor is 100mV. Substituting these conditions, we get the relationship that Cfilt is twenty times the internal sample and hold capacitor. This relationship has been used in many design examples, and has proven to be accurate for most cases. In some unusual cases, a different Cfilt is required for better settling. For that reason the algorithm provides alternative minimum and maximum values for the external filter capacitor as given in equations 8 and 9.
Note 1: Experience shows that using the fixed factors of 20 yields good results.
Note 2: In rare cases, you may need to sweep Cfilt. Thus the factors of 10 and 30.

6. Time constant required for settling to error target
(10)
This is the standard RC charge equation.
τc = time constant for charging Csh.
Vinit = initial voltage at start of tacq
Vfinal = final voltage for fully charged Cfilt
(11)
Error is less than ½ LSB
(12)
Droop is 100mV
(13)
Substitute 11 and 12 into 10
(14)
Solve (13) for τc
Note: τc includes effects from Op Amp and Cfilt
The op amp is being modeled as a second order system (RC circuit)
The next set of equations relate to the time constant for the amplifier and RC load. Equation 10 is for the filter charge during the acquisition period. Note that “tau c” is for the complete time constant and is partly from the amplifier bandwidth limitations and also from the RC circuit. Equation 11 states that the final error is less than half of one LSB. Equation 12 states that the droop at the start of acquisition is equal to 100mV. Equation 13 is determined by substituting the three previous equations, and equation 14 solves for the time constant.

7. Find Rfilt and Amplifier Bandwidth
𝜏 𝑐 = 𝜏 𝑅𝐶 𝜏 𝑂𝐴 2
(15)
τc can be approximated as the RSS of the time constant of the filter and the op amp.
𝜏 𝑅𝐶 =4∙ 𝜏 𝑂𝐴
(16)
Rule of thumb for good settling
𝜏 𝑐 = 4∙ 𝜏 𝑂𝐴 𝜏 𝑂𝐴 2
(17)
Substitute (16) into (15)
𝜏 𝑂𝐴 = 𝜏 𝑐 17
(18)
Solve (17)
𝜏 𝑅𝐶 =4∙ 𝜏 𝑐 17
(19)
Substitute (18) into (16)
𝑅 𝑓𝑖𝑙𝑡 = 𝜏 𝑅𝐶 𝐶 𝑓𝑖𝑙𝑡
(20)
Nominal filter resistance.
𝑹 𝒇𝒊𝒍𝒕_𝒎𝒊𝒏 =𝟎.𝟐𝟓∙ 𝑹 𝒇𝒊𝒍𝒕
(21)
Minimum value of Rfilt used in SPICE iteration
𝑹 𝒇𝒊𝒍𝒕_𝒎𝒂𝒙 =𝟐∙ 𝑹 𝒇𝒊𝒍𝒕
(22)
Maximum value of Rfilt used in SPICE iteration
𝑼𝑮𝑩𝑾= 𝟏 𝟐∙𝝅∙ 𝝉 𝑶𝑨
(23)
Minimum amplifier bandwidth
This is the final slide in the derivations. Equation 15 is a general equation for adding time constants. The RC time constant and op amp time constant add like the square root sum of the squares. As a rule of thumb, we have found that the amplifier bandwidth should be four times faster than the RC bandwidth. Substituting 16 into 15 and solving produces equation 18 which relates the op amp time constant to the total time constant. The same approach is followed to find the time constant for the RC circuit. This is used in equation 20 to find the nominal resistance used in the external charge bucket circuit. Experience has shown us that the optimal value for the filter resistor may be different than this nominal value so we set up a range of one fourth the nominal value to double the nominal value. This range is used in simulation to optimize the filter settling. Finally equation 23 determines the minimum unity gain bandwidth for the amplifier to achieve good settling.

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