1. Digital Design Fundamentals

2. Basic Logic Gates Logic Function Gate Symbol Logic Expression Truth
Table

3. Basic Logic Gates with Inverted Outputs

4. Circuit Implementation of a Logic Expression with Gates
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ACOE161 - Digital Logic for Computers - Frederick University
(c) Costas Kyriacou

5. Circuit Implementation of Logic Expressions:- Examples
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ACOE161 - Digital Logic for Computers - Frederick University
(c) Costas Kyriacou

6. Analyzing a logic circuit using timing diagrams
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ACOE161 - Digital Logic for Computers - Frederick University
(c) Costas Kyriacou

7. Three-Variable K-Maps

8. Three-Variable K-Map Examples

9. Four-Variable K-Maps

10. Four-Variable K-Maps

11. Four-Variable K-Maps Examples

12. ACOE161 - Digital Logic for Computers - Frederick University
Don’t Care Conditions
In many application it is known in advance that some of the input combinations will never occur. These combinations are marked as “Don’t Care Conditions” and are used as either zero’s or one’s so that the application is implemented with the most simplified circuit.
Example: Simplify the logic expression X(A,B,C,D) with the don’t care conditions d(A,B,C,D).
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13. Design of combinational digital circuits (Cont.)
Example: Design a 4-input (A,B,C,D) digital circuit that will give at its output (X) a logic 1 only if the binary number formed at the input is between 2 and 9 (including).

14. Don’t Care Conditions: Examples
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15. Revision on MSI Devices
M. Mano & C. Kime: Logic and Computer Design Fundamentals (Chapter 5)

16. MSI Devices
Medium Scale Integration (MSI) devices are digital devices that are build using a few tens to hundreds of logic gates.
MSI devices are used as discrete devices packed in a single Integrated Circuit (IC), or as building blocks for other, more complex devices such as memory devices or microprocessors.
Some typical MSI devices are the following:
Encoders and Decoders
Multiplexers and Demultiplexers
Full Adders
Latches and flip flops
Registers and Counters

17. Examples of MSI Devices
Decimal to BCD Encoder
4-to-1 Multiplexer
BCD to Decimal Decoder

18. Decoders
A decoder is a combinational digital circuit with a number of inputs ‘n’ and a number of outputs ‘m’, where m= 2n
Only one of the outputs is enabled at a time. The output enabled is the one specified by the binary number formed at the inputs of the decoder.
On the circuit below, the inputs of the decoder are connected on three switches, forming the number 5 [(101)2], thus only the lamp #5 will be ON

19. 2 to 4 Line Decoder:

20. 3 to 8 Line Decoder:

21. Multiplexers
A multiplexer is a device that has a number of data inputs “m”, and number of control inputs “n” and one output, such that m=2n. The output has always the same value as the data input specified by the binary number at the control inputs.
The rotary switch (selector) shown in figure (a) below, is equivalent to a 4-to-1 multiplexer.
The sliding switch shown in figure (b) below, is equivalent to an 8-to-1 multiplexer.

22. Internal structure of a 2-to-1 multiplexer.
The design of a 2-to-1 multiplexer is shown below.
If S=0 then the output “Y” has the same value as the input “I0”
If S=1 then the output “Y” has the same value as the input “I1”

23. 1-bit Full Adder

24. 4-bit Full Adder (Ripple-Carry Adder)
To obtain a 4-bit full adder we cascade four 1-bit full adders, by connecting the Carry Out bit of bit column M to the Carry In of the bit column M+1, as shown below. The Carry In of the Least Significant column is set to zero.
Example: Find the bit values of the outputs {Cout,S3..S0} of the full adder shown below, if {A3..A0 = 1011} and {B3..B0 = 0111}.

25. Magnitude Comparator

26. The D Edge Triggered Flip Flop
The D edge triggered flip flop can be obtained by connecting the J with the K inputs of a JK flip through an inverter as shown below. The D edge trigger can also be obtained by connecting the S with the R inputs of a SR edge triggered flip flop through an inverter.

27. The Toggle (T) Edge Triggered Flip Flop
The T edge triggered flip flop can be obtained by connecting the J with the K inputs of a JK flip directly. When T is zero then both J and K are zero and the Q output does not change. When T is one then both J and K are one and the Q output will change to the opposite state, or toggle.

28. D and T Edge Triggered Flip Flops :- Example
Complete the timing diagrams for :
Positive Edge Triggered D Flip Flop
Positive Edge Triggered T Flip Flop
Negative Edge Triggered T Flip Flop
Negative Edge Triggered D Flip Flop

29. Flip Flops with asynchronous inputs (Preset and Clear)
Two extra inputs are often found on flip flops, that either clear or preset the output. These inputs are effective at any time, thus are called asynchronous. If the Clear is at logic 0 then the output is forced to 0, irrespective of the other normal inputs. If the Preset is at logic 0 then the output is forced to 1, irrespective of the other normal inputs. The preset and the clear inputs can not be 0 simultaneously. In the Preset and Clear are both 1 then the flip flop behaves according to its normal truth table.

30. JK Flip Flop With Preset and Clear:- Example
Complete the timing diagrams for :
Positive Edge Triggered JK Flip Flop
Negative Edge Triggered JK Flip Flop.
Assume that for both cases the Q output is initially at logic zero.

31. Sequential circuit example 1

32. ACOE161 - Digital Logic for Computers - Frederick University
Finite State Machine
A generic model for sequential circuits used in sequential circuit design
ACOE161 - Digital Logic for Computers - Frederick University

33. Finite state machine block diagram
State memory: Set of n flip-flops that hold the state of the machine (up to 2^n distinct states)
Next state logic: Combinational circuit that determines the next state as a function of the current state and the input
Output logic: Combinational circuit that determines the output as a function of the current state and the input
ACOE161 - Digital Logic for Computers - Frederick University

34. Finite State Machine types
Mealy machine: The output depends on the current state and input
Moore machine: The output depends only on the current state
State = output state machine: A Moore type FSM where the current state is the output
ACOE161 - Digital Logic for Computers - Frederick University

35. ACOE161 - Digital Logic for Computers - Frederick University
State diagram
A state diagram represents the states as circles and the transitions between them as arrows annotated with inputs and outputs
ACOE161 - Digital Logic for Computers - Frederick University

36. Analysis of FSMs with D flip-flops
Determine the next state and output functions
Use the functions to create a state/output table that specifies every possible next state and output for any combination of current state and input
ACOE161 - Digital Logic for Computers - Frederick University

37. ACOE161 - Digital Logic for Computers - Frederick University
EXAMPLE
ACOE161 - Digital Logic for Computers - Frederick University

38. Next state equations and state table for exampley 1
A+=Ax+Bx
B+=A΄x
Y=(A+B)x΄
ACOE161 - Digital Logic for Computers - Frederick University

39. ACOE161 - Digital Logic for Computers - Frederick University
A+=Ax+Bx
B+=A΄x
Y=(A+B)x΄ A B x A+ B+ y 1
ACOE161 - Digital Logic for Computers - Frederick University

40. Sequential circuit design methodology
From the description of the functionality or the state/timing diagram find the state table
Encode the states if the state table contains letters
Find the necessary number of flip-flops
Select flip/flop type
From the state table, find the excitation tables and output tables
Using Karnaugh maps find the flip-flop input logic expressions
Draw the circuit logic diagram
ACOE161 - Digital Logic for Computers - Frederick University

41. Example: Design the sequential circuit of the following state diagram
ACOE161 - Digital Logic for Computers - Frederick University

42. State/excitation tableDA DB JA KA JB KB 1
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43. Karnaugh maps for combinational circuit
ACOE161 - Digital Logic for Computers - Frederick University

44. ACOE161 - Digital Logic for Computers - Frederick University
Circuit logic diagram
ACOE161 - Digital Logic for Computers - Frederick University