1. EE 201C Project 3 [Due on 03-20-2016] Submit code and report to:
On Campus Students: Xiao
Online Students: Wei Wu
Subject: EE201C_PRJ3_Name_UID

2. Electrical Modeling of 3D IC
What is 3D Technology?
A family of technologies, enabling stacking of silicon layers and vertical connections between them using Through-silicon Vias (TSV).
Insulation Layer: SiO2 Cu
Fig.1. 3D IC system
Fig.2. TSV structure

3. Electrical Modeling of 3D IC
3D IC - What’s the Benefits ?
Higher density, lower latency, and less power
Increased device density per area footprint
Reduce cost of next level of packaging
Much higher levels of chip-to-chip I/O connections
Ability to tightly integrate dissimilar technologies
Typical height of TSV (Z) is :10um~30um
Fig.3. 3D Heterogeneous Integration based on TSV
(Different processes and Different chips)

4. Electrical Modeling of 3D IC
Electrical Model of TSV
RLCG Model of TSV
Fig.5. Electrical model with labeled components for SG structure (Structure of a signal TSV and a ground TSV).
Fig.4 TSV SEM
Rtsv: Resistance of TSV
Ltsv: Inductance of TSV
Cinsulator: The capacitance of insulation layer
Csi: The capacitance of Silicon substrate between S and G
Gsi: The Conductance of Silicon substrate between S and G

5. Electrical Modeling of 3D IC
Electrical Model of TSV
Parasitic Extraction for TSV
(1) TSV Resistance (Rtsv) and Inductance (Ltsv)
* μTSV= μr,TSV* μ0

6. Electrical Modeling of 3D IC
Electrical Model of TSV
Parasitic Extraction for TSV
(2) Insulation Layer Capacitance (Cinsulator)
(3) Si Substrate Capacitance (Csi)
(4) Si Substrate Conductance (Gsi)
*Cosh-1 (x) is Inverse hyperbolic cosine function
Cosh-1 (x)= ln[x+(x2-1)1/2]

7. Electrical Modeling of 3D IC
Electrical Model of TSV
Parasitic Extraction for TSV
Table I Model Parameters and Their Symbols
Parameter
Symbol
TSV diameter
dTSV
Resistivity of TSV
ρTSV
TSV height
hTSV
Conductivity of TSV
σTSV
TSV-to-TSV pitch
PTSV
Relative permittivity of insulator
εr ,Insulator
Insulator thickness
tox
Relative permittivity of Silicon substrate
εr ,Si
Conductivity of Silicon substrate
σsi
Relative permeability of TSV
μr,TSV
Table II Material Properties and Their Value
Symbol
Value
σsi
10[S/m]
σTSV
0.58e8[S/m]
ρTSV
1.68e-8[Ωm]
μr,TSV 1
εr ,Si
11.9
ε0 (permittivity of vacuum)
8.85e-12[F/m]
εr ,Insulator 4
μ0 (permeability of vacuum)
4πe-7 [NA]

8. Electrical Modeling of 3D IC-Homework
Calculate Scattering Parameter (S-parameter)
Using proposed TSV electrical model to calculate two-port S21 parameter from 100MHz to 10GHz, frequency step=500MHz
(2) Give the variation tendency of S21 (only real part)dependent on frequency, and explain what the reason causes this variation tendency
pTSV=30um A Cu Cu
hTSV=30um
dTSV=5um B
tox=0.2um
Fig. 6 The dimensions of TSV used in calculation

9. Electrical Modeling of 3D IC-Homework
Step1. Parasitic Extraction of TSV
-Rtsv, Ltsv,Cinsulator,Csi,Gsi
Step2.
-Transform RLCG model to Y (admittance) network
-Calculate Y1,Y2,Y2
Port 1
Port 2
π-element model
Two port Y network

10. Step.4. Calculate Y Matrix
Step.5. Transform the Y Matrix to S Matrix
Assume Z0 =50 Ω

11. Electrical Modeling of 3D IC
*Submit following calculation results:
(1) The S21 parameters under the given frequency point
(2) Explain the variation tendency of S21 dependending on frequency
(read the reference to find reason)

12. The references:
[1] Kim, J., Pak, J.S., Cho, J., Song, E., Cho, J., Kim, H., Song, T., Lee, J., Lee, H., Park, K. and Yang, S., High-frequency scalable electrical model and analysis of a through silicon via (TSV). Components, Packaging and Manufacturing Technology, IEEE Transactions on, 1(2), pp