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CSE 140 : Components and Design Techniques for Digital Systems

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Presentation on theme: "CSE 140 : Components and Design Techniques for Digital Systems"— Presentation transcript:

1 CSE 140 : Components and Design Techniques for Digital Systems
Discussion Session 3 Mihir Patankar

2 Midterm review Transistors and Logic gates Boolean Algebra SOP, POS
K-maps and logic minimization COMBINATION OF THESE !!!

3 Transistors and Logic gates Gates and transistors NOT NAND

4 Boolean Algebra Summary
De Morgan’s Theorem (A+B+C+ …..)’ = A’ . B’ . C’ + …… (A.B.C. …..)’ = A’ + B’ + C’ + ... Consensus Theorem AB + A’C + BC = AB + A’C

5 Practice Problem (Boolean Algebra + Transistors)
Find output Q. Simplify using boolean algebra. Draw simplified circuit using NOR gates and INVERTERS only.

6 k-maps Intuitive way to simplify boolean equations with few variables
Just another way of representing the truth table in a grid Helps grouping and logic simplification

7 Practice Problem (k-map + SOP + POS)
F(A,B,C,D) = ∑m(1,2,4,5,7,11,15) + DC(0,8) Implicants : Any VALID grouping of 1’s. ALL subcubes are implicants Prime Implicants : Implicant which is NOT a part of any other subcube Essential Prime implicants : Contains at least one 1 that cannot be combined by any other sub cube

8 SOP Minimisation F(A,B,C,D) = A’C’ + A’B’D’ + BCD + ACD

9 POS Minimisation F(A,B,C,D) = (A+B+C’+D’). (A’+C). (A’+D)

10 Some more practice problems !!

11 Homework 2 Problem 2 Simplify to minimal SOP : (a’ + c + d)(b + c + d)(a + b + c’) Simplify to minimal POS : a’c+a’b’d+cd’

12 Word Problem A logic network has three inputs (A, B, C) and one output (Z). In the following situations we set the output Z to either a logic zero or one: 1. The output Z is logic 1 when the binary value of ABC is greater than 3 and odd. 2. When the binary value of ABC is greater than 3 and even, Z is a logic 0 3. When the binary value of ABC is less than 3, the output Z follows the result of the expression B⊕C 4. Don’t care otherwise Give truth table, canonical SOP, minimal SOP

13 MT Fall 15 : Problem 1 Consider following Boolean expressions:
F0=(x + y)(x' + y') + x'y' + xy F1=xy’+x’y F2=(x’+y)(x+y’) Prove that F0=F1+F2 using Boolean algebra

14 MT Fall 15 : Problem 2 A car has a fuel level detector that outputs the current fuel level as a 3­bit binary number abc corresponding to values ranging from 000=empty to 111=full. Create a circuit that illuminates a “low fuel” indicator light by setting output L to 1 when the fuel level drops below level 3 (011 ­ not inclusive). Give truth table, canonical SOP, minimal SOP


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