1. Electromagnetic Compatibility BHUKYA RAMESH NAIK 1

2. Digital Circuit Design for EMC BHUKYA RAMESH NAIK 2

3. Frequency vs Time Domain Bandwidth of a digital signal is related to its rise time by the equation: BW= 1/π.tr Tr=1nS  BW=318MHz BHUKYA RAMESH NAIK 3

4. Analog vs Digital systems  Analog systems – External noise sources are of main concern  Digital systems – Internal noise sources are of main concern BHUKYA RAMESH NAIK 4

5. Noise Generation - example  Power supply wiring inductance – 50nH  Transient current – 50mA (Multiple gates taking small currents)  Gate switching time – 1nS  Noise generated = L di/dt = 2.5V !  Even though voltage and current levels are small, switching speed, inductance associated with the circuit etc. matters ………. BHUKYA RAMESH NAIK 5

6. Digital Circuit – Noise 1  Discharge from output capacitor cause increase in ground potential  Wrong switching of gate 4  Antenna effect of cables connected BHUKYA RAMESH NAIK 6

7. Digital Circuit – Noise 2  Overlap current during switching causes large transient current to be drawn from the power supply. BHUKYA RAMESH NAIK 7

8. Resistance vs Inductance of PCB Track  Typical Resistance of a PCB track = 82mΩ/in  Typical loop Inductance = 15nH/in Impedance provided by this inductance at frequencies above 10MHz is much more than 82mΩ. So Inductance of PCB tracks play major role in digital designs BHUKYA RAMESH NAIK 8

9. Reducing Inductance  Reduce the length of the conductor  PCB track, IC leads etc.  Parallel paths for the current flow BHUKYA RAMESH NAIK 9

10. Practical Ground connection in a system  To provide Low impedance ground connection between all possible circuits  As many parallel ground paths as possible  Ground grid  Extending to infinite parallel paths – Ground Plane BHUKYA RAMESH NAIK 10

11. Ground Grid - Example BHUKYA RAMESH NAIK 11

12. Ground Grid  Width of a trace – DC (low frequency ) consideration to reduce the resistance  Gridding – High frequency considerations to reduce the inductance  Grid should (Better to) be routed before the other circuits. BHUKYA RAMESH NAIK 12

13. Ground Grid to Ground Plane  The impedance depends on frequency. So to reduce the impedance, as frequency of operation increases, number of parallel paths also should increase.  Extending to infinite parallel paths – Ground Plane BHUKYA RAMESH NAIK 13

14. Ground Plane as a Grid BHUKYA RAMESH NAIK 14

15. Loop Area Two conductors carrying currents in opposite directions have a total loop inductance, L 1 +L 2 -2M = 2(L-M) Increasing M will reduce the loop inductance. Placing conductor and return paths close together will increase M and hence reduce the loop inducatcne. BHUKYA RAMESH NAIK 15

16. Reference Plane Current Distribution BHUKYA RAMESH NAIK 16

17. Micro-Strip Line Return current will flow where the electric field is present BHUKYA RAMESH NAIK 17

18. Micro-Strip Line Reference Plane Current Density Distribution necessary to produce minimum inductance BHUKYA RAMESH NAIK 18

19. Normalized current density Most of the current remains close to the trace BHUKYA RAMESH NAIK 19

20. Percentage of Reference plane current BHUKYA RAMESH NAIK 20

21. Cross Talk  Results of interaction between the fields produced by the traces  Field reduces as x/h increases;  So, it can be reduced by placing the conductor closer to the reference plane. BHUKYA RAMESH NAIK 21

22. Strip-Line Reference Plane current density BHUKYA RAMESH NAIK 22

23. Reference Plane Current Density  Not as wide as Micro-strip line BHUKYA RAMESH NAIK 23

24. Asymmetric Strip Line BHUKYA RAMESH NAIK 24

25. Current Density (h 2 =2h 1 ) Dotted Line – Close Plane Solid Line – Far Plane BHUKYA RAMESH NAIK 25

26. Comparison BHUKYA RAMESH NAIK 26

27. End effects Ground plane inductance will be more close to the entry and exit point of currents BHUKYA RAMESH NAIK 27

28. Ground plane inductance – Single via BHUKYA RAMESH NAIK 28

29. Via BHUKYA RAMESH NAIK 29

30. Ground plane inductance – Multiple via BHUKYA RAMESH NAIK 30

31. Multiple via BHUKYA RAMESH NAIK 31

32. Digital Logic Transient current flow (Transient current flow path) BHUKYA RAMESH NAIK 32

33. Micro Strip line – adjacent to ground plane Low to High Transition BHUKYA RAMESH NAIK 33

34. Micro Strip line – adjacent to ground plane High to Low Transition BHUKYA RAMESH NAIK 34

35. Micro Strip line – adjacent to power plane Low to High Transition BHUKYA RAMESH NAIK 35

36. Micro Strip line – adjacent to power plane High to Low Transition BHUKYA RAMESH NAIK 36

37. Strip line – Between power and Power planes Low to High Transition BHUKYA RAMESH NAIK 37

38. Strip line – Between power and Power planes High to Low Transition BHUKYA RAMESH NAIK 38

39. Strip Line between two ground/power planes  Same as micro strip adjacent to ground/power plane  Half current in each plane BHUKYA RAMESH NAIK 39

40. Strip Line – Less radiative  Currents in two near by loops are in opposite directions, and hence radiations from them almost cancel each other BHUKYA RAMESH NAIK 40

41. Current flow – In general  It does not matter what the reference plane is - ground or power.  High-to-Low Transition  Current enters the driver IC through signal pin and exit through ground pin  Low-to-High Transition  Current enters the driver IC through power pin and exit through signal pin BHUKYA RAMESH NAIK 41