1. MICHAEL CHIANG EECS 713 12/05/2013 Presenting: Capacitors

2. Objective: Lab exercise for Capacitors Understand bypass/decoupling capacitor selection. Calculate the capacitors for specific rise time/knee frequency of a HSDC. Measure characteristics of capacitor

3. What is a capacitor? Capacitor is a two terminal electrical component used to store electric charge with conductors separated by an insulator.

4. Capacitor Applications: Capacitors are used in applications such as energy storage, power systems, noise suppression and coupling. In a high speed digital device, capacitors are used for uniform voltage distribution (bypass) and shunt current to the return path (decoupling) to provide low impedance path between power and ground or ground connections between gates. Every capacitor has a parasitic series inductance (lead inductance, package inductance, or mounting inductance – ESL), parasitic series resistance (equivalent Series resistance – ESR) which is real impedance, and self- resonate frequency (SRF):

5. Circuit Issues For uniform voltage distribution, a shunt capacitor is connected to the power supply in the frequency range where wired inductance can be a problem. This bypass capacitor provides low impedance between ground and power plane. Bypass capacitor loses effectiveness at high frequency where it becomes inductance. This problem is resolved by an assortment of capacitors (large and smaller) used to provide low impedance power source for every logic device across various operating frequency range.

6. Example Problem: We need to design a CMOS circuit with 75 gates each switching at 5pF loads in 1ns. The 5V power supply inductance is 2.81nH. a) Find the bypass capacitor needed for this application with logic noise margin tolerance of 0.1V. b) If the bypass capacitor has series inductance of 5nH, what is the maximum effective frequency? c) Determine the array of capacitor.

7. Solution Part a: Determine the max step change in supply current of the board: Determine the maximum power supply noise that the logic can tolerate: 0.1V Calculate the maximum common-path impedance: determine the inductance of the power supply wiring L PSW =2.81nH: Find bypass capacitor:

8. Solution Part b & c: The maximum frequency at which capacitor is effective With the T r we can calculate the inductance tolerance at high frequency. Determine the number of bypass capacitors is needed for total inductance. Calculate the total array capacitance Calculate the capacitance of each element in the array

9. Measuring Capacitor Characteristics Using Test Jig Using Impedance Analyzer

10. Test Jig Setup Materials  Oscillocope: Tektronix DPO 4054  Pulse Gen: SYSTRON 101 Pulse Generator  Resistors:  100Ω, 0805, 1%  10Ω, 0805, 1%  Capacitor:  1µF, 0603, X5R, 10V  Cu Board  Analyzer Probes

11. Test Jig: Cu Board

12. Test Jig: Lead Inductance R s = source resistance of test jig, Ω = 4.35Ω A = area under spike, Vs = 844.5pVs ∆V = Open-circuit Step Voltage of test jig, V = 0.996V L = lead inductance, H Open Circuit test Load: 1µF Capacitor

13. Test Jig: ESR R s = source resistance of test jig, Ω = 4.35Ω X = measured step voltage after spike, V = 0.064V ∆V = Open-circuit Step Voltage of test jig, V = 0.996V

14. Test Jig: Capacitance ∆V = Open-circuit Step Voltage of test jig, V = 0.996V R s = source resistance of test jig, Ω = 4.35Ω X = measured step voltage after spike, V = 0.064V dV/dt = charge rate of ramp, V/s = 0.236V/998ns = 236472.9V/s C = capacitance, F

15. Impedance Analyzer: Resonance Frequency Materials  Impedance Analyzer: HP 4194A  Bread board  Capacitors:  0.1µF, 0603, X7R, 16V  1µF, 0402, X5R, 10V  1µF, 0603, X5R, 10V  10µF, 0603, X5R, 6.3V

16. Impedance Analyzer: Resonance Frequency

17. Impedance Analyzer: Results 1µF, 0603, X5R, 10V Ls @ 5MHzESR @1.93MHzCs @ 1MHz 8.102nH10.1Ω1.47µF ResonanceESR 1000pF, 0603, X7R, 50V51.5MHz9.44Ω 0.1µF, 0603, X7R, 16V4.7MHz7.53Ω 1µF, 0402, X5R, 10V1.9MHz10.1Ω 1µF, 0603, X5R, 10V1.53MHz1.18Ω 10µF, 0603, X5R, 6.3V534kHz6.81Ω

18. Resonance Frequency: When the frequency is below the SRF it behaves capacitive. When the frequency is above the SRF it behaves inductively. The inductance in systems induces voltage change between the logic components and supply or ground plane that introduces noise. Therefore, a capacitor selected must behave capacitively.

19. 1µF Ceramic Capacitor (0603) From Test Jig From Impedance Analyzer

20. Reference: Johnson, Howard, et al. “High Speed Digital Design: A Handbook of Black Magic”. Pearson Education, New Delhi, 1993, p253-255 & 275-299. http://www.farnell.com/datasheets/1525783.pdf http://people.eecs.ku.edu/~callen/713/713_Vias- F13.ppt http://people.eecs.ku.edu/~callen/713/713_Vias- F13.ppt