Presentation is loading. Please wait.

Presentation is loading. Please wait.

Digital Logic & Design Dr. Waseem Ikram Lecture 38.

Similar presentations


Presentation on theme: "Digital Logic & Design Dr. Waseem Ikram Lecture 38."— Presentation transcript:

1 Digital Logic & Design Dr. Waseem Ikram Lecture 38

2 Recap

3 Equation definition for the Traffic Light Controller
Equations TRSTATE.CLK = clk; TMRST := (TRSTATE = = NSY2) # (TRSTATE = = EWY2);

4 The circuit diagram of the Traffic Light Controller

5 Pin declarations for the turning on/off traffic lamps
FLASHCLK, MANUAL pin 1, 2; !Q0, !Q1, !Q pin 4, 5, 6; NSRED, NSYEL, NSGRN pin 19, 18, 17; EWRED, EWYEL, EWGRN pin 14, 13, 12;

6 Switching of traffic lamps at different states
NSGRN NSYEL NSRED EWGRN EWYEL EWRED NSG on off NSY NSY2 NSR EWG EWY EWY2 EWR

7 Equation definition for the turning on/off traffic lamps
Equations NSRED = !MANUAL & (TRSTATE !=NSG) & (TRSTATE != NSY) & (TRSTATE != NSY2); NSYEL = !MANUAL & ((TRSTATE = = NSY) # (TRSTATE = = NSY2)) # MANUAL & FLASHCLK; NSGRN = !MANUAL & (TRSTATE = = NSG); EWRED = !MANUAL & (TRSTATE !=EWG) & (TRSTATE != EWY) & (TRSTATE != EWY2); EWYEL = !MANUAL & ((TRSTATE = = EWY) # (TRSTATE = = EWY2)) EWGRN = !MANUAL & (TRSTATE = = EWG);

8 S-R flip-flop Transition table
Flip-flop Inputs Output Transitions S R Qt Qt+1 x 1

9 Characteristic Equation for S-R Latch
SR/Qt 1 00 01 11 x 10

10 Characteristic equations of Latches and Flip-flops
Device Type Characteristic Equation S-R Latch D Latch Edge-triggered D flip-flop J-K flip-flop

11 Clocked Synchronous State Machine based on D flip-flops

12 Excitation Equations for D flip-flop inputs D0 and D1
Excitation Inputs D0 D1

13 Transition Equations for D flip-flops

14 Transition Table for D flip-flop based State Machine
Present State Next State ENABLE=0 ENABLE=1 Q1 Q0 1

15 State table of a Mealy Machine
Present State Next State ENABLE=0 ENABLE=1 Output MAX A B C D 1

16 State Diagram of a Mealy Machine

17 State table of a Moore Machine
Present State Next State ENABLE=0 ENABLE=1 Output MAX A B C D 1

18 State Diagram of a Moore Machine

19 Clocked Synchronous State Machine based on J-K flip-flops

20 Traffic Light Controller

21 Excitation Equations for J-K flip-flop inputs J0 K0 and J1 K1
Excitation Inputs J0 K0 J1 K1

22

23 Transition Equations for J-K flip-flops

24 Transition Table for D flip-flop based State Machine
Present State Next State XY=00 XY=01 XY=10 XY=11 Q1 Q0 1

25 State Table of a Mealy Machine
Present State Next State Output Z XY 00 01 10 11 A C B 1 D

26 Traffic Light Controller
PLD Programming

27 Analysis of Synchronous State Machines

28 Digital Logic Design Lecture 38


Download ppt "Digital Logic & Design Dr. Waseem Ikram Lecture 38."

Similar presentations


Ads by Google