1. ECE 3430 – Intro to Microcomputer Systems
ECE 3430 – Introduction to Microcomputer Systems University of Colorado at Colorado Springs
Lecture #3
Agenda Today
MSP430 Programming Model
Registers
CPU Instructions and Addressing
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

2. ECE 3430 – Intro to Microcomputer Systems
MSP430 Microcontroller
MSP430: The 16-bit microcontroller that we will be using in the lab.
General Purpose I/O Registers are mapped into memory space and treated as a
Registers: normal memory address by the programmer. CPU registers are used to perform general purpose operations
(arithmetic, logic). They do not occupy memory space but are
accessible by the programmer. There are 12 general-purpose
registers in the MSP430 CPU—all of which are 16-bit (R4-R15).
Status Register: 16-bit register used mainly for tracking CPU status (SR). Contains
a snapshot of the Z, C, V, and N ALU flags.
Stack Pointer: 16-bit register that points to the STACK. The STACK is a first
in, last out structure maintained in RAM. The Stack Pointer (SP)
points to the empty space on top of the stack.
Program Counter: 16-bit register that holds the location of the next instruction to be
executed by the CPU (PC).
Constant Generators: A clever 16-bit register used only as a data source. Registers return
different values for different addressing modes. This type of
register improves code density in RISC architectures (CG1/CG2).
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

3. ECE 3430 – Intro to Microcomputer Systems
MSP430 Programming Model
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

4. 16-bit reads/writes must use an even address!
MSP430 Microcontroller
Memory Addressing:
The MSP430 (like most architectures) is a byte-addressable architecture.
This means that each address (regardless of precision) references
an 8-bit value stored in memory. The MSP430 uses 16-bits for addressing.
MSP430 uses a von Neumann memory system architecture (a single memory system
program code and data).
The MSP430 has 16 address lines = 216 = 65,536 locations.
The CPU reads from/writes to memory by:
Providing a 16-bit address to the memory via the address bus (MAB).
Accepting/providing an 8 or 16-bit data value from/to memory across
the data bus (MDB).
16-bit reads/writes must use an even address!
Address
Data
CPU
Memory
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

5. ECE 3430 – Intro to Microcomputer Systems
MSP430 Microcontroller
Memory Map – A graphical way to illustrate memory. We will use this continually throughout the semester The MSP430 has an address range from h’0000’ to h’FFFF’.
Kilobyte/Kibibyte - KiB = 210 = 1024, so we say we have a 64KiB byte memory
Megabyte/Mebibyte - MiB = KiB2 = 1,048, Ex) When we say “64K” byte memory, that is actually (64)(210) = 65,536 bytes.
Properly written, it is 64KiB of memory.
# of Address Lines - 2(# of address lines) = the number of locations we can access with that many lines.
h’0000’
h’0001’ :
h’FFFE’
h’FFFF’
8-bits
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

6. Instructions and Addressing
Instruction: All MSP430 instructions are 16 bits long. In addition
to which instruction to be executed, the 16-bit
instruction code is encoded with information such as
source and destination registers, addressing modes,
and data size.
Opcode: A subset of the instruction code that specifies an
instruction in the MSP430 instruction set.
Operand: Additional information (parameters) used by an
instruction.
Memory Notation: “M” = contents of memory () = address
Memory
Ex) M(0000h) = 55AAh
M(0002h) = FFh
Program Counter
h’0000’ AAh
h’0001’ 55h
h’0002’ FFh
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

7. MSP430 Instructions (Sampler)
The MSP430 uses move operations to accomplish loading from
and storing to memory locations. Depending on the source and
destination of the move, read and/or write cycles may be generated
on the MAB/MDB. Read/write cycles will not exist if data is moved
internally to the CPU (between general-purpose registers for
example) *.
Loading: Moving data into the CPU. Always generates a read cycle on the MAB/MDB.
Storing: Moving data out of the CPU. Always generates a write cycle on the MAB/MDB.
* The CPU always does a 16-bit memory read on the MAB/MDB to get the instruction code.
After it “sees” what instruction to execute, further read/write cycles may not be required. The above discussion does not consider the
instruction code read.
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014

8. ECE 3430 – Intro to Microcomputer Systems
MSP430 Move Instructions
Format: mov.b/w src,dest ; <comment>
Data movement not involving the MAB/MDB (register-to-register) *:
mov.w R5,R6 ; move (copy) word from R5 to R6
mov.b R7,R8 ; move (copy) byte from R7 to R8
Some example load from memory instructions:
mov.w #FEEDh, R5 ; initialize R5 with the word value h’FEED’
mov.b 3(R5), R6 ; load byte from address M(R5)+3 into R6
; load word from address M(R5) into R6
; load word following current instruction in memory
Some example store to memory instructions:
mov.b R6,3(R5) ; store byte in R6 to address 3+M(R5)
mov.w R7,0(R8) ; store word in R7 to address M(R8)
* The CPU always does a 16-bit memory read on the MAB/MDB to get the instruction code.
After it “sees” what instruction to execute, further read/write cycles may not be required. The above discussion does not consider the
instruction code read.
Lecture #3
ECE 3430 – Intro to Microcomputer Systems
Fall 2014