1. EI205 Lecture 15
Dianguang Ma
Fall 2008

2. Integrated Circuit Technologies
Chapter 15
Integrated Circuit Technologies

3. 15-1 BASIC OPERATIONAL CHARACTERISTICS AND PARAMETERS
DC supply vlotage
TTL: +5 V
CMOS: +5V, +3.3 V

4. Basic Operational Characteristics and Parameters
CMOS Logic Levels (+5 V CMOS)

5. Basic Operational Characteristics and Parameters
CMOS Logic Levels (+3.3 V CMOS)

6. Basic Operational Characteristics and Parameters
TTL Logic Levels

7. Basic Operational Characteristics and Parameters
Noise margin

8. Basic Operational Characteristics and Parameters
Noise margin

9. Basic Operational Characteristics and Parameters
Noise margin
HIGH-level noise margin
LOW-level noise margin

10. Basic Operational Characteristics and Parameters
Power dissipation (assume the duty cycle is 50%)

11. Basic Operational Characteristics and Parameters
Power dissipation in a TTL circuit is essentially constant over its range of operating frequencies. Power dissipation in CMOS, however, is frequency dependent.
Where, C is the equivalent load capacitance.

12. Basic Operational Characteristics and Parameters
Propagation delay
LOW-to-HIGH propagation delay
HIGH-to-LOW propagation delay

13. Basic Operational Characteristics and Parameters
Speed-power product (in picojoule, pJ): the lower the speed-power product, the better the logic gate.
Loading and Fan-out: The fan-out of a gate is the maximum number of gate inputs that it can drive while remaining within guaranteed specification.

14. Basic Operational Characteristics and Parameters
CMOS loading. The type of transistors used in CMOS logic present a predominantly capacitive load to the driving gate. The limitations are the charging and discharging times associated with the output resistance of the driving gate and the input capacitance of the load gates. The fewer the load gate inputs, the smaller the equivalent capacitance, the greater the maximum frequency of operation.

15. Basic Operational Characteristics and Parameters
TTL loading. A TTL driving gate sources current to a load gate input in the HIGH state and sinks current from the load gate in the LOW state.

16. Basic Operational Characteristics and Parameters
TTL loading. The total source current or sink current increases with each load gate input that is added. One input of the same logic family as the driving gate is called a unit load.

17. 15-2 CMOS CIRCUITS
The MOSFET: MOSFETs are the active switching elements in the CMOS circuits.

18. CMOS Inverter
CMOS logic uses the MOSFET in complementary pairs as its basic element. A complementary pair uses both p-channel and n-channel enhancement MOSFETs.

19. Operation of a CMOS Inverter
Input Q1 Q2
Output
HIGH S C
LOW

20. CMOS NAND Gate

21. CMOS NOR Gate

22. Open-Drain Gates
The term open-drain means that the drain terminal of the output transistor is unconnected and must be connected externally to dc power supply through a load (pull-up resistor).

23. Tristate CMOS Gates
The three output states are HIGH, LOW, and high-impedance (high-Z).

24. Tristate CMOS Gates
When the enable input is active, the device is enabled for normal logic operation. When the enable input is inactive, the device is disabled and the output is effectively open.

25. Tristate CMOS Gates
Bus configuration

26. Tristate CMOS Gates
Other possible circuit configurations.

27. Unused CMOS Inputs
All unused inputs should be connected to the supply or ground. If left open, an input can acquire electrostatic charge and “float” to unpredicted levels.

28. 15-3 TTL CIRCUITS
The BJT: Bipolar junction transistors are the active switching elements in the CMOS circuits.

29. TTL Inverter Q1 (input coupling transistor).
D1 (input clamp diode) prevents negative spikes of voltage on the input from damaging Q1.
Q2 (phase splitter) generates the two complementary voltages signals required to drive the totem-pole circuit.
Q3 and Q4 (totem pole) provide to gate with a low output resistance.
D2 (level offset diode) ensures Q4 to be reliably cutoff.

30. Totem Pole
(Image of a ) natural object, considered by American Indians as the symbol of a family.
Tall wooden pole carved or painted with a series of totems.

31. Operation of a TTL Inverter
Assume: input HIGH = 3.4 V, input LOW = 0.2 V.

32. TTL NAND Gate
Multiple-emitter transistor is used for the input device.

33. TTL NOR Gate

34. TTL AND-OR-Inverter

35. TTL XOR Gate

36. Open-Collector Gates
Notice that the output is the collector of transistor Q3 with nothing connected to it, hence the name open collector.

37. Tristate TTL Gates
A TTL tristate inverter.

38. Schottky TTL
Most TTL logic used today is some form of Schottky TTL, which provides a faster switching time by incorporating Schottky diodes to prevent the transistors from going into deep saturation, thereby decreasing the time for a transistor to turn on or off.

39. 15-4 PRACTICAL CONSIDERATIONS IN THE USE OF TTL
Current sinking and current sourcing

40. Practical Considerations in the Use of TTL
Example 15-4: Determine the fan-out of the 7400 NAND gate.
Solution: According to the data sheet, the current parameters are as follows:
The fan-out is

41. Practical Considerations in the Use of TTL
Using OC gates for wired-AND operation

42. Practical Considerations in the Use of TTL
Using OC gates for wired-AND operation

43. Practical Considerations in the Use of TTL
Totem-pole outputs cannot be connected together because such a connection might produce excessive current and result in damage to the devices.

44. Practical Considerations in the Use of TTL
Open-collector buffer/drivers used for driving LEDs, incandescent lamps, or relays.

45. Practical Considerations in the Use of TTL
Unused TTL inputs: An unconnected input on a TTL gate acts as a HIGH. However, because of noise sensitivity, it is best not to leave unused TTL inputs unconnected (open).

46. 15-5 COMPARISON OF CMOS AND TTL PERFORMANCE
Now, CMOS is often equal or superior in many areas and has become dominant IC technology, alough TTL is still widely available and in use.

47. Homework
Problems 2, 10, 12, 14, 18, 22, 26, 30.