1. Operational Amplifiers
or Op Amps for short

2. OP-AMP
An operational amplifier is a direct coupled high gain amplifier usually consisting of one or more differential amplifiers and usually followed by a level translator and an output stage.
The Output stage is generally a push-pull or push-pull complementary symmetry pair.
Used to amplify ac as well as dc
computing mathematical function like addition, subtraction, multiplication and integration.
Thus the name operational amplifier stems from its original use for these mathematical operations

3. BLOCK DIAGRAM
1ST stage provides most of the voltage gain of the amplifier and also establishes the input resistance of the op-amp.
The intermediate stage is driven by the output of the first stage.
Due to direct coupling, the dc voltage at the output of the intermediate stage is above the ground potential.
Level translator circuit is used after intermediate stage to shift the dc level at the output of the intermediate stage downward to zero volts with respect to ground.

4. The final stage is usually a push pull complementary amplifier output stage.
The output stage increases the output voltage swing and raises the current supplies capability of opamp.
A well designed output stage also provides low output resistance.

5. Positive power supply (Positive rail)
SYMBOL
Positive power supply (Positive rail)
Inverting input
terminal
Output terminal
Non-inverting
Input terminal
Negative power supply
(Negative rail)

6. OP-AMP 741C IC

7. Op Amp Equivalent Circuit
vd = v2 – v1
A is the open-loop voltage gain v2 v1
Voltage controlled voltage source

8. Attenuates and phases at high frequencies (depends on slew rate)
Ideal Op-Amp
Typical Op-Amp
Input Resistance
infinity
106  (bipolar)
109   (FET)
Input Current
10-12 – 10-8 A
Output Resistance
100 – 1000 
Operational Gain
Common Mode Gain
10-5
Bandwidth
Attenuates and phases at high frequencies (depends on slew rate)
Slew Rate
1 V/μs

9. Voltage Transfer Characteristic
Range where we operate the op amp as an amplifier. vd

10. Closed Loop Gain if is
i1 = 0 v1 v2
i2 = 0

11. Example #2 (con’t) if if is is i1 io i2
For an almost ideal op amp, Ri = ∞ W and Ro = 0 W. The output voltage will never reach V+ or V-.