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HCAL task status report

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Presentation on theme: "HCAL task status report"— Presentation transcript:

1 HCAL task status report
Felix Sefkow EUDET Annual Meeting Oct 10, 2007

2 Calibration electronics Detector optimization
Overview Goal: A compact and realistic (i.e. scaleable) scintillator HCAL structure with embedded electronics Electronics integration Mechanics Scintillator Photo-sensors Calibration electronics Calibration studies Test beam Detector integration Detector optimization EUDET Infrastructure FEE DAQ HCAL task Felix Sefkow Oct 10, 2007

3 All dimensions are preliminary TILE MGPD
Chemically treated edges for light reflection Ø Schedule OK: Tiles for electronics unit in 2008 For complete layer / small test stack in 2009 MGPD 2.54 Ø=? 0.6 556 cells, Ø1mm CPTA, Moscow 0.8 2.7 4.0 M.Danilov, ITEP

4 MGPD PROPERTIES OK for WLS readout; direct coupling
studied in parallel M.Danilov HCAL task Felix Sefkow Oct 10, 2007

5 Test beam Not part of EUDET, but has impact:
Feedback to detector concept and calibration methods Availability of human resources June 2007: all HCAL active layers completed (8000 SiPMs) Movable stage completed, fully functional HCAL task Felix Sefkow Oct 10, 2007

6 Example: temp. dependence of gain for 5000 channels
Test beam calibration Calibration is done with MIPs (muons) To be established for ILC: simulations Monitoring with Temperature sensors LED reference pulses (problematic) Direct observation of SiPM gain Calibration electronics developed and built in Prague Redundancy for cross-checks Large dynamic range Calibration data analysis: DESY, Bergen Tools for multi-channel studies developed S.Schaetzel, DESY Example: temp. dependence of gain for 5000 channels HCAL task Felix Sefkow Oct 10, 2007

7 Saturation Curves for Module 13, 5-6
Compare 4 runs from August & October Saturation curve after pedestal subtraction, PIN & gain correction SiPM non-linearity - Does in-situ meas. agree with test bench? Is it stable? First results encouraging, but analysis ongoing Saturation curve after adjustment to common origin with slope one G.Eigen, Bergen  August runs  October runs G. Eigen,HCAL task Paris, Felix Sefkow Oct 10, 2007

8 Calibration system approaches
Optical signal distribution central pulser (one or few per layer) Minimized cross-talk to readout (photo-sensors and FEE) Monitoring of light source stability for reference possible Most frequently made choice, experience Electrical signal distribution Many pulsers, one per single or few channels Avoids optical coupling problems (stability, uniformity) Can work with very small electrical and optical pulses Not yet tried until now HCAL task Felix Sefkow Oct 10, 2007

9 QR LED driver Development at IoP, Prague
Quasi-resonant circuit: minimize electromagnetic interference I.Polak, Prague Wavefrom and Xtalk OK 2 channel PCB in month 22 LED PIN HCAL task Felix Sefkow Oct 10, 2007

10 LED on board Proof-of-principle, check for cross-talk, uniformity
Test also Different driver schematics Small connector SiPM coupling M.Reinecke, DESY HCAL task Felix Sefkow Oct 10, 2007

11 Ongoing optimization and measurements (ligt uniformity, dyn. range,…)
Estimate Crosstalk Scope in averaging mode Light in Tile 1 ≈40mV Crosstalk to tile 2 and tile 4 ≈1mV Very encouraging Ongoing optimization and measurements (ligt uniformity, dyn. range,…) Crosstalk ≈ 2.5% electr./optical ?? HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

12 Integrated layer design
Sector wall Reflector Foil 100µm Polyimide Foil PCB 800µm Bolt with inner M3 thread welded to bottom plate SiPM Tile 3mm HBU Interface 500µm gap Bottom Plate 600µm ASIC TQFP-100 1mm high Top Plate 600µm steel Component Area: 900µm high HBU height: 6.1mm (4.9mm without covers => absorber) Absorber Plates (steel) Spacer 1.7mm fixing DESY integrated HCAL task Felix Sefkow Oct 10, 2007

13 HBU – PCB Layer Structure
6 layer design with cut-outs for ASICS and connectors 75W Lines for high-gain SiPM setup Two signal layers for impedance-controlled routing Total height (PCB + components): 1.5mm Two companies agreed on structure at reasonable costs!! HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

14 EUDET annual meeting – Paris
Slabs of an AHCAL layer AHCAL slab 12x12 tiles HBU: Number of channels per layer not constant! 9x12 tiles 24 SPIROCs in chain 6 HBUs in a row Two flexleads for interconnection Slow-Control and Readout token to LDA DIF-DIF conn. HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

15 HEB Interconnection Concept
Flexlead and 80-pin connector Interconnection to AHCAL- Layer (HBU) POWER CALIB DIF DIF-DIF conn. Redundancy against failures of LDA HLD Changes Size from Layer to layer HEB Same Size for all 38 AHCAL layers To LDA DIF - Detector Interface (Configuration and Operation) CALIB - Light and/or Charge calibration and monitoring POWER – Layer power and temperature monitors Mezzanine setup allows independent development of different groups. HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

16 AHCAL Half Sector - Integration
AHCAL Slab 6 HBUs in a row HBU HCAL Base Unit typ. 12 x 12 tiles SPIROC typ. 4 on a HBU HEB HCAL Endcap Board Hosts mezzanine modules: DIF, CALIB and POWER HLD HCAL Layer Distributor HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

17 Temperature / Power Dissipation
From P. Göttlicher (DESY) No. channels: 1100 / m² Pow. Diss.: 40µW / channel (25µW ASIC, 15µW HV, 3A / layer during bunch train) Time constant of heat effects: a = 6 days Temperature at far end (DT): DT ≈ 0.3 °C Power pulsing and a good thermal connection (cooling) enables a stable operation! HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke LCWS 2007 – DESY Hamburg

18 POWER to AHCAL layer For 1V in 2ms: 3.4mF 10 SMD tantal
Components on HEB, HLD For 1V in 2ms: 3.4mF 10 SMD tantal For 5mV in 1µs: 340µF 40 large ceramic ‚Slow‘ ‚Fast‘ P. Göttlicher, DESY HCAL task Felix Sefkow Oct 10, 2007

19 Testboard II : ASIC + Integration
SPIROC Testboard (HBU prototype): Assembly (Tiles, PCB, ASICs, LEDs), Cassette Construction Performance in the dense HBU setup: Noise, gain, crosstalk, power and signal integrity DAQ Interface LCS with LEDs on board. Tile integration to HBU : see M. Danilov‘s talk (alignment pins) HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

20 Testboard III : Power-System
Test Power-Ground System (2.20m): Oscillations when switching? Voltage drop, signal integrity (traces, connectors)? SPIROC far end (blocking caps sufficient)? ‚Layer Concentrator‘ (DIF*) Extenders (Power-Gnd, Traces) SPIROC Testboard HCAL task Felix Sefkow Oct 10, 2007 Mathias Reinecke EUDET annual meeting – Paris Oct. 2007

21 Mechanical design Engineering resources: Cassette: Absorber structure:
EUDET position filled as of Oct 1st, 2007 Increasing support at DESY after end of HERA and completion of CALICE test beam set-up Cassette: Evolve testbeam prototype design Absorber structure: Start re-evaluation of TESLA design HCAL task Felix Sefkow Oct 10, 2007

22 Milestones and Deliverables
reports Concepts, designs – and final prototypes concepts designs VME test stand construction PPT construction Testbeam data taking feedback HCAL task Felix Sefkow Oct 10, 2007

23 Conclusion Things are starting to fall into place
A nice concept is emerging – looking forward to the design phase The HCAL task is on track HCAL task Felix Sefkow Oct 10, 2007


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