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d ~ r Results Characterization of GaAsP NWs grown on Si substrates

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Presentation on theme: "d ~ r Results Characterization of GaAsP NWs grown on Si substrates"— Presentation transcript:

1 d ~ r Results Characterization of GaAsP NWs grown on Si substrates
S. Ali1, S. Rybchenko1, H. Liu2, Y. Zhang2, S.K Haywood1 1. School of Engineering, University of Hull, Cottingham Road Hull, HU6 7RX 2. Department of Electronic and Electrical Engineering, University College London, Torrington Place London WC1E 7JE School of Engineering Sample preparation Motivation By integrating direct band gap III−V materials onto the mature and cost-effective Si platform, high absorption coefficients, high carrier mobilities, and large solar spectrum coverage could be achieved, creating novel optoelectronic devices for Si photonics. This integration remains challenging due to the large lattice mismatch and the difference in thermal expansion coefficient. In planar epitaxy a lattice mismatch of less than 1% leads to a degradation of layer quality due to the formation of misfit dislocations In recent years, one-dimensional semiconductor III−V nanowires (NWs) have gained significant attention for integrating III−V materials and devices on a Si platform because of their unique structural, optical, and electronic properties. The strain formed between III−V NWs and Si substrates can be effectively relieved over a thickness of a few monolayers due to a small contact area and large surface-to volume ratio. It has been predicted that a two-junction tandem solar cell, consisting of a 1.7 eV NW (GaAsP) junction and a 1.1 eV Si junction, has a theoretical efficiency of 33.8% at 1 sun AM1.5G and 42.3% under 500 suns AM1.5D concentration.1,2 Two pieces of sample glued face to face, then four dummy Si sample glued on its sides (two in each side). After the glue is set, 2.5 x 2.2 x 0.5 cm square piece, cut by diamond saw One side of the sample is griound using a manual grinder and then polished using an electric polisher Second side of the sample is ground manually until its thickness is reduced to nearly 100um and then polished using an electric polisher Then sample is ion milled using a PIPs machine at 5keV, 3rpm, single side beam modulation. Next the sample is characterised by TEM SEM Results EDX Raman EDX analysis is performed on GaAs(1-x)Px NWs No trend in material composition along the length of NW within EDX accuracy i.e. x = ± 0.02 where Also ratio of III/V is close to one NWs can be revealed by strong LO/SO peak as comparted to TO phonon peak. PL intensity map appears to be complementary to the Raman intensity distribution. The reason for this is not very clear at the moment. Fig.1 SEM image of GaAs(1-x)Px NW/Si at 10k, 30o tilt Area of measurement = um2 NW density: NWs per cm2 TEM---- Detached NWs Most of the faults are at the tail and middle part of the NW However the head is defect free GaAs(1-x)Px NWs sample, ultrasonically bathed in acetone. Drop of acetone solution contacting NWs is placed on lacy carbon TEM grid. Long & thin NWs Length=7-8um Diameter = 50-60nm Short & fat NWs Length=3-4 um Diameter = nm Tail head Extended areas in NW which are defect free TEM---- Cross Section of NWs Strained Relaxed d > r’ d ~ r Cross section samples of NWs are prepared using method described in sample preparation NW Si Substrate Residual material NW-substrate interface is strained (no dislocations). Residual material-substrate interface is relaxed (having dislocations) Strain patterns under each NW Results Summary Two type of NWs in our GaAs(1-x)Px sample, ‘short fat’ and ‘long thin’ NWs material composition remained the same along its entire length in both types. Large density of stacking faults and twins are observed within the NW; majority of the defects are at the tail of the NW In a cross-sectional study, NWs are standing strained and the area of the strain is similar to the diameter of the NW, so there must be no dislocations at NW/Si interface which is proved in our high magnification TEM results. However, residual material deposited at the time of growth has strain patterns less than the size of their diameter, hence there must be dislocations in it. A further study is on-going to investigate these dislocations. References (1) LaPierre, R. R. J. Appl. Phys. 2011, 110, (2) Geisz, J. F.; Friedman, D. J. Semicond. Sci. Technol. 2002, 17, 769 At low magnification, strain patterns at both sides of the NW/Si interface At high magnification, NW/Si interface has no dislocations


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