1. PyBAR Firmware Structure and Operation Experience
Bin Yu
Department of Electrical Engineering
University of Washington

2. What’s PyBAR ? The new DAQ software from Univeristy of Bonn
The name is from “Python Bonn ATLAS Readout”
The new ideas behind PyBAR:
Almost impossible to include all the functionality into existing DAQ system.
1. Spend less time on developing new DAQ software
2. Fast implementation of new scan algorithms
3. Advanced studies of charge collection efficiency
4. High speed readout
5. Human readable data formats and configuration files

3. PyBAR and Basil
PyBAR is the new DAQ Software which is written in Python scripting language
Basil is modular readout framework developed to allow fast and easy chip testing.
The firmware is based on Basil. Some parts of the firmware that were developed in early stages of pyBAR were merged back to Basil.

4. Features Rewritten from ground up
Support of existing USBpix card and USBpix adapter cards:
Single – Channel Adapter Card
4 – Channel Burn- in Card
Continuous data taking
Supporting simultaneous and continuous 4-chip readout
Continuous trigger rate up to 200kHz (2x IBL spec) (full 16 BC read out, single FE-I4)
Peak trigger rate can be much higher
Simulation of full FPGA code inside a FEI4 test bench
FPGA firmware is stable and ready for use

5. Scans / tests ready for use:
Global Register Test
Pixel Register Test
  Digital Scan
  Analog Scan
Threshold Scan
ToT Verification
Global Feedback Tuning
Global Threshold Tuning
FDAC Tuning
TDAC Tuning (almost done)
Source Scan (External Trigger)
External Charge Injection

6. Firmware Structure
The new Firmware Basil is written by Verilog hardware description language.
For the Basil – V59(not the newest version), we can find the Verilog module under the /basil-v59/device/modules/…
However, for newest version, the wiki on the basil page shows that Verilog source code is in the src folder, but not inside of modules folder.
The Basil and PyBar is still developing very fast. The new code is almost updated every few days.
In the example folder, a simple ISE project is located.

7. Firmware Structure

8. Firmware Structure Modules of basil: (For Basil-v59)
Chipscope: To scope signals with the FPGA(Not Verilog code, but for ISE design suit)
gpac_adc_rx : The module to receive output from the general purpose adapter cad:
The ADC FPGA module address has to be specified in the top Verilog file.
One ADC word has 32-bits. The last 28 bits contain 2 14-bit samples of ADC data.
gpio8: General purpose input/output(for 8bit register)
pulse_gen: Generate a pulse
seq_gen: To generate a sequence(like, to make a bit stream out of general purpose input/output)
spi: Serial programming interface, like serial in/out clock, serial clock output, serial data input/output, load and enable
sram_fifo: Implements the SRAM as a FIFO. (SRAM: Static Radom Access Memory, FIFO: Flip flop)
tb : For test beam data taking.
utils: To store some general sub-modules. Most of the sub-modules will be used in the other modules above.

9. Installation and Operation Experience
The code of PyBar is clean and short.
The developer of PyBar try to simplified the interface, no GUI.
PyBar need lots of external package, so the process of installation is a little bit confused.
However, Bonn University have a great “step- by-step guide” about installation on PyBar wiki page. bonn.de/projects/pybar/wiki/Step-by-step-guide
Short hints about PyBar installation for beginner on Elog.

10. Operation Experience Hardware hints:
Don’t use ribbon cable! We have to provide the power to the Front End externally!!
If you are interested in this problem, you can read this reference from University of Bonn.
Power supply
Connect with computer

11. Operation Experience Easier to operate than USBpix Control.
Don’t need to do complicated setting.
Just run the python scripts from host directory(like: “test_; “scan_” and “tune_”)
Easier to access the data, and the data is more readable.

12. Operation Experience Two way to run the test: Use Eclipse: The second
Way is “cd” to the /PyBar/trunk/host/…. ; and use python **.python to run the python source code.

13. Operation Experience Get the data from PyBar Two way:
Use the external software: ViTable
You can get the readable data in the window.
all hits for all scans always available / no infos lost / time stamping with < 0.2s precision

14. Operation Experience
Right click an item and click “plot data with PyBar…”
Then you can get the following graph:

15. Operation Experience The second way: Just open the truck/host/data/…
This fold stores all result of scans and tests.
You can find some .pdf files, then click the one you wanted.

16. Operation Experience
For the right operation, please connect the circuit in the right way
Install PyBar by following the instruction on wiki page of PyBar and Elog
Install all the externall package for PyBar, like pyUSB,libUSB,ViTable.

17. How to get into contact pyBAR developers?
•  pyBAR project homepage: – 
–  Activity browser
–  Repository browser
–  Bug tracker (file bug reports and feature requests here)
–  Wiki (expanding a little every day)
•  pyBAR mailing list: –