1. MCU software on Andes platform
Andes Technology

2. Outline Andes bootstrap U-boot loader + standalone program μC/OS -II
ANDES Confidential

3. The Purpose of This Training Class
Teach All the skills relating Andes software developing
Maybe you are not familiar with Andes developing tools. But you can programming everything if you want to learn.
ANDES Confidential

4. Andes bootstrap Purpose Device lowlevel Initial Link to main program
Content
Setup vectors
Reset
Lowlevel_init
Relocate
Copy_loop
Remap
Clear bss
Setup stack
Jump to main program
Linker script
MUC image
bootstrap
Size around 2k
Main program
( μC/OS -II /
AP/
U-boot /
Linux…)
ANDES Confidential

5. Bootstrap Source Code Study
********************************************************************************************************
! uC/OS-II
! The Real-Time Kernel !
! (c) Copyright , Andes Techonology
! All Rights Reserved
! NDS32 Generic Port
! GNU C Compiler
! File : OS_CPU_A.ASM
! Version : V1.50
! By : Swee Andes Technology
!********************************************************************************************************
! INCLUDE ASSEMBLY CONSTANTS
#include "n12_def.h"
! IMPORT and EXPORT
! IMPORT OSRunning
! IMPORT OSPrioCur
! IMPORT OSPrioHighRdy
! IMPORT OSTCBCur
! IMPORT OSTCBHighRdy
! IMPORT OSIntNesting
! IMPORT OSIntExit
! IMPORT OSTaskSwHook
! IMPORT OS_CPU_IRQ_ISR_Handler
! IMPORT BSP_Init
! IMPORT APP_Init
! IMPORT _edata
! IMPORT _end
.global _start
.global OSStartHighRdy
.global OSCtxSw
.global OSIntCtxSw
.global OS_Init_Nds32
.global OS_Int_Vectors
.global OS_Int_Vectors_End
/* pre-define */
.equ DEBUG,
.equ ANDES_PLATFORM,
.equ SYSTEM_INIT,
! Switch to interruption level \lv
.macro IntlSwitch lv
mfsr $a0, $PSW
li $a1, #~PSW_mskINTL
and $a0, $a0, $a1
ori $a0, $a0, #(\lv << PSW_offINTL)
mtsr $a0, $PSW
isb
.endm
! Save current task's context
.macro CtxSave
#ifdef NDS32_REDUCE_REGS
pushm $r28, $r30
pushm $r15, $r15
pushm $r0, $r10
#else
pushm $r0, $r30
#endif
mfusr $a5, $d0.hi ! get d0.hi
mfusr $a4, $d0.lo ! get d0.lo
mfusr $a3, $d1.hi ! get d1.hi
mfusr $a2, $d1.lo ! get d1.lo
mfsr $a1, $IPC ! get return address
mfsr $a0, $IPSW ! get IPSW
pushm $a0, $a5
move $a0, $sp
andi $a1, $sp, #7
bnez $a1, 1f
push $a0 1:
! Restore to new task's context
.macro CtxRestore
pop $a0
move $sp, $a0
popm $a0, $a5
mtsr $a0, $IPSW
mtsr $a1, $IPC
mtusr $a2, $d1.lo
mtusr $a3, $d1.hi
mtusr $a4, $d0.lo
mtusr $a5, $d0.hi
popm $r0, $r10
popm $r15, $r15
popm $r28, $r30
popm $r0, $r30
.macro CallFn fn
addi $sp, $sp, #-24 ! reserve 6 words accroding to ABI
bal \fn
addi $sp, $sp, #24
! Entry and initialization
.section .init, "ax"
_start:
j OS_Init_Nds32
.section .text
! Define standard NDS32 vector table entry point of interruption vectors
.macro VECTOR handler
.align 4
sethi $a0, hi20(\handler)
ori $a0, $a0, lo12(\handler)
jral $a0, $a0
OS_Int_Vectors:
VECTOR OS_Init_Nds32 ! (0) Trap Reset/NMI
VECTOR OS_Trap_TLB_Fill ! (1) Trap TLB fill
VECTOR OS_Trap_PTE_Not_Present ! (2) Trap PTE not present
VECTOR OS_Trap_TLB_Misc ! (3) Trap TLB misc
VECTOR OS_Trap_TLB_VLPT_Miss ! (4) Trap TLB VLPT miss
VECTOR OS_Trap_Machine_Error ! (5) Trap Machine error
VECTOR OS_Trap_Debug_Related ! (6) Trap Debug related
VECTOR OS_Trap_General_Exception ! (7) Trap General exception
VECTOR OS_Trap_Syscall ! (8) Syscall
VECTOR OS_Trap_Interrupt_HW0 ! (9) Interrupt HW0
VECTOR OS_Trap_Interrupt_HW1 ! (10) Interrupt HW1
VECTOR OS_Trap_Interrupt_HW2 ! (11) Interrupt HW2
VECTOR OS_Trap_Interrupt_HW3 ! (12) Interrupt HW3
VECTOR OS_Trap_Interrupt_HW4 ! (13) Interrupt HW4
VECTOR OS_Trap_Interrupt_HW5 ! (14) Interrupt HW5
VECTOR OS_SWI ! (15) Interrupt SW0
OS_Int_Vectors_End:
! Redirect unhandled exceptions / interrupts
OS_Trap_TLB_Fill:
li $a0, 0x01
b OS_Exception
OS_Trap_PTE_Not_Present:
li $a0, 0x02
OS_Trap_TLB_Misc:
li $a0, 0x03
OS_Trap_TLB_VLPT_Miss:
li $a0, 0x04
OS_Trap_Machine_Error:
li $a0, 0x05
OS_Trap_Debug_Related:
li $a0, 0x06
OS_Exception:
li $a1, 0x902ffffc
swi $a0, [$a1]
OS_Trap_Syscall:
li $a0, 0x07
b OS_Unused
OS_Trap_Interrupt_HW0:
li $a0, 0x08
OS_Trap_Interrupt_HW2:
li $a0, 0x09
OS_Trap_Interrupt_HW3:
li $a0, 0x0A
OS_Trap_Interrupt_HW4:
li $a0, 0x0B
OS_Trap_Interrupt_HW5:
li $a0, 0x0C
OS_SWI:
li $a0, 0x0D
OS_Unused:
OS_Trap_General_Exception:
push $a1
li $a0, 0x0E
die:
b die
mfsr $a0, $IPC
addi $a0, $a0, #4
mtsr $a0, $IPC
pop $a1
CtxSave
! CallFn tm_interrupt_handler
! CallFn tm_interrupt_preemption_handler
CtxRestore
iret
! OS_Init_Nds32
! Note(s) : 1) OS_Init_Nds32 init SP pointer, cache,
.align 2
OS_Init_Nds32:
/* reset */
.if ANDES_PLATFORM
li $r0, 0x
lwi $r1, [$r0]
srli $r2, $r1, #1
andi $r2, $r2, #0x1
bnez $r2, NormalBoot
li $r0, 0x ! 32-bit boot
li $r1, 0x
li $r2, 0x
swi $r1, [$r0+#0x00]
swi $r2, [$r0+#0x04]
li $r1, #0x200000
la $r0, _text
addi $r0, $r0, #0x5ec
add $r0, $r0, $r1
jr $r0
.endif ! end ANDES_PLATFORM
NormalBoot:
.if DEBUG
move $r7, #0x10
bal show_80
.endif
! Processor should be in Super User mode
! Disable interrupts, change to interruption level 0
li $a1, #~PSW_MSK
li $a1, #PSW_INIT
or $a0, $a0, $a1
move $r7, #0x11
mfsr $a0, $INT_MASK
li $a1, #~INT_MASK_MSK
li $a1, #INT_MASK_INIT
mtsr $a0, $INT_MASK
mfsr $a0, $IVB
li $a1, #~IVB_MSK
li $a1, #IVB_INIT
mtsr $a0, $IVB
mfsr $a0, $MMU_CTL
li $a1, #~MMU_CTL_MSK
li $a1, #MMU_CTL_INIT
mtsr $a0, $MMU_CTL
mfsr $a0, $CACHE_CTL
li $a1, #~CACHE_CTL_MSK
li $a0, #CACHE_CTL_INIT
mtsr $a0, $CACHE_CTL
.if SYSTEM_INIT
bal lowlevel_init
/* relocate */
#! relocate:
move $r7, #0x14
#! copy ROM code to SDRAM(current is at 0x ) and verify
li $r4, #0x ! 0x DRAM HIGH memory
la $r5, _text
la $r6, __bss_start
/* copy_loop */
17: !copy_loop
move $r7, #0x15
lwi $r7, [$r5]
swi $r7, [$r4]
lwi $r8, [$r4]
bne $r7, $r8, die !SDRAM_ERROR
addi $r5, $r5, #4
addi $r4, $r4, #4
blt $r5, $r6, 17b
bal remap
.endif ! end of SYSTEM_INIT
! Clear bss
la $a0, _edata
la $a1, _end
li $a2, #0
sub $a3, $a0, $a1
bgez $a3, 2f
swi.bi $a2, [$a0], #4
b 1b 2:
move $r7, #0x12
! Set-up the stack pointer
la $sp, __OS_Sys_Stack
#if (defined(CONFIG_CPU_ICACHE_ENABLE) || defined(CONFIG_CPU_DCACHE_ENABLE))
li $a1, #MMU_CTL_INIT_CACHE_ON
#ifdef CONFIG_CPU_ICACHE_ENABLE
CallFn n12_icache_flush;
li $a1, (0x1UL << CACHE_CTL_offIC_EN)
#ifdef CONFIG_CPU_DCACHE_ENABLE
CallFn n12_dcache_invalidate;
li $a1, (0x1UL << CACHE_CTL_offDC_EN)
move $r7, #0x13
.if DEBUG
move $r7, #0x18
! Perform BSP initialization
CallFn BSP_Init
! Call APP_Init(fisrt_available_memory), and never go back
la $a0, _end
CallFn APP_Init
! Infinite loop, if returned from APP_Init accidently
! START MULTITASKING
! void OSStartHighRdy(void)
! Note(s) : 1) OSStartHighRdy() MUST:
! a) Call OSTaskSwHook() then,
! b) Set OSRunning to TRUE,
! c) Switch to the highest priority task.
.text
OSStartHighRdy:
#if OS_TASK_SW_HOOK_EN
CallFn OSTaskSwHook
li $a0, #1 ! OSRunning = TRUE
la $a1, OSRunning
sbi $a0, [$a1]
! Switch to highest priority task
la $a0, OSTCBHighRdy ! Get highest priority task TCB->stack pointer
lwi $a1, [$a0]
lwi $sp, [$a1] ! Switch to the new stack
IntlSwitch #1 ! Switch to interruption level 1
CtxRestore ! Restore to origianl task's context
! PERFORM A CONTEXT SWITCH (From task level) - OSCtxSw()
! Note(s) : 1) OSCtxSw() is called in SYS mode with BOTH FIQ and IRQ interrupts DISABLED
! ) The pseudo-code for OSCtxSw() is:
! a) Save the current task's context onto the current task's stack
! b) OSTCBCur->OSTCBStkPtr = $SP
! c) OSTaskSwHook()
! d) OSPrioCur = OSPrioHighRdy
! e) OSTCBCur = OSTCBHighRdy
! f) $SP = OSTCBHighRdy->OSTCBStkPtr
! g) Restore the new task's context from the new task's stack
! h) Return to new task's code
! ) Upon entry:
! OSTCBCur points to the OS_TCB of the task to suspend
! OSTCBHighRdy points to the OS_TCB of the task to resume
OSCtxSw:
mtsr $lp, $IPC
CtxSave ! Save current task's context
la $a0, OSTCBCur ! OSTCBCur->OSTCBStkPtr = $SP
swi $sp, [$a1]
! Fall through for the rest of handling (step c -> h)
! PERFORM A CONTEXT SWITCH (From interrupt level) - OSIntCtxSw()
! Note(s) : 1) OSIntCtxSw() is called in SYS mode with BOTH FIQ and IRQ interrupts DISABLED
! a) OSTaskSwHook()
! b) OSPrioCur = OSPrioHighRdy
! c) OSTCBCur = OSTCBHighRdy
! d) $SP = OSTCBHighRdy->OSTCBStkPtr
! e) Restore the new task's context from the new task's stack
! f) Return to new task's code
OSIntCtxSw:
la $a0, OSPrioHighRdy ! OSPrioCur = OSPrioHighRdy
lbi $a1, [$a0]
la $a0, OSPrioCur
sbi $a1, [$a0]
la $a0, OSTCBHighRdy ! OSTCBCur = OSTCBHighRdy
la $a0, OSTCBCur
swi $a1, [$a0]
lwi $sp, [$a1] ! $SP = OSTCBHighRdy->OSTCBStkPtr
! IRQ Interrupt Service Routine
OS_Trap_Interrupt_HW1:
xor $a0, $a0, $a0
#ifdef CONFIG_USING_PFM
mtsr $a0, $PFMC0
push $ta
li $ta, #(0x x10) /* Timer 2 counter */
swi $a0, [$ta + #0]
pop $ta
! Check whether or not IRQ really happened
mfsr $a0, $INT_PEND
andi $a0, $a0, #INT_PEND_mskH1I
bnez $a0, 1f
IntlSwitch #0 ! Switch to interrupt level 0
! Handle nesting counter
la $a1, OSIntNesting ! if (OSIntNesting == 0) {
lbi $a0, [$a1]
bnez $a0, 2f
la $a0, OSTCBCur ! OSTCBCur->OSTCBStkPtr = $SP
! Switch to Interruption stack ! $SP = &__OS_Int_Stack
la $sp, __OS_Int_Stack ! }
CallFn OSIntEnter
CallFn OS_CPU_IRQ_ISR_Handler
CallFn OSIntExit
! Check for non-nested interruption return
la $a0, OSIntNesting ! if (OSIntNesting == 0) {
bnez $a1, 3f
la $a0, OSTCBCur ! $SP = OSTCBCur->OSTCBStkPtr
lwi $sp, [$a1]
3: ! }
/* show led on leopard */
.global show_80
show_80:
li $r8, 0x902ffffc ! 0x902ffffc
swi $r7, [$r8]
ret
! POINTERS TO VARIABLES
.data
.align 3
.skip IRQ_STACK_SIZE
__OS_Int_Stack:
.skip SYS_STACK_SIZE
__OS_Sys_Stack:
.end
Setup vectors
Reset
Lowlevel_init
Relocate
Copy_loop
Remap
Clear bss
Setup stack
Jump to main program
ANDES Confidential

6. Bootstrap Procedure Analysis
text/code
Setup vectors
Reset
Lowlevel_init
Relocate
Copy_loop
Remap
Clear bss
Setup stack
Jump to main program
Setup vectors
Reset
Lowlevel_init
Relocate
Copy_loop
Clear bss
Setup stack
Remap
Jump to main program
data
AndesCore 0x 0x 0x 0x
DRAM
Flash
Watchdog,UART…..
AHB/APB
BUS
ANDES Confidential

7. Boot Loader Linker Script
/* Linker script for AG101 diagnostic program */
OUTPUT_FORMAT("elf32-nds32", "elf32-nds32", "elf32-nds32")
OUTPUT_ARCH(nds32)
ENTRY(_start)
SECTIONS {
. = 0x ;
. = ALIGN(4);
.text :
_text = .;
*(.init)
*(.text) }
__data_start = .;
.data ALIGN(4) :
*(.data)
__data_end = .;
__sdata_start = .;
.sdata ALIGN(4) :
*(.sdata_w)
*(.sdata_h)
*(.sdata_b)
__sdata_end = .;
_edata = .;
PROVIDE(edata = .);
.bss : {
__bss_start = .;
*(.sbss_b .sbss_b.*)
*(.scommon_b .scommon_b.*)
. = ALIGN(2);
*(.sbss_h .sbss_h.*)
*(.scommon_h .scommon_h.*)
. = ALIGN(4);
*(.sbss_w .sbss_w.*)
*(.scommon_w .scommon_w.*)
*(.dynsbss)
*(.scommon)
. = ALIGN(8);
*(.sbss_d .sbss_d.*)
*(.scommon_d .scommon_d.*)
*(.bss)
*(COMMON)
/* *(.scommon) */
/*_end = .;*/
__bss_end = .; }
…………………………………..
ANDES Confidential

8. DPF Architecture on μC/OS –II
Advantage of OS, particularly RTOS
μC/OS –II version 2.8.6
Andes
Platform SD
Audio
Display
ANDES Confidential

9. Andes boot code - EBIOS Please press a GPIO Button for booting:
_________________________________________________________
GPIO1 (SW4): Run Setup & Diagnosis
GPIO2 (SW5): Burnin Test
CPUID: 0x | COREID: 0 |
Andes Development Platform Diagnosis Menu, (cheetah)
CPU: N9 Platform: ADP-XC5FF676 Cache: id-off CPU: 40MHz HCLK: 40MHz
( 1) SDRAM Test ( 2) Timer Test ( 3) DMA Test
( 5) UART Loopback Test ( 6) UART DMA Test ( 9) Watchdog Test
(10) Watchdog Reset Test(11) MAC Loopback Test (12) Flash Test
(13) SODIMM Sizing (14) SDRAM(bnk1,2) (17) AC97 Test
(18) AC97 DMA Test (20) I2C Test (21) LCD Test
(22) LCD Menu (23) Query RTC (24) RTC Alarm Test
(25) GPIO Test (35) CF, SD Test (53) Enable Cache
(54) Disable Cache (55) CLI (67) Set Console's UART
(75) Burnin Test (76) Auto Burnin Test (78) Fully Auto Test
(79) Interactive Test (91) GO LINUX (95) Burn Image Main
(96) NDS BOOT (97) CopyImageFromCard (98) Exec_User_Programd
(99) Setup
Command>>
ANDES Confidential

10. Lab : EBIOS <-> μC/OS –II
Compiler/build μC/OS –II demo program-without bootstrap
Download to EVB board DRAM
Execute μC/OS –II demo program
Compiler/build μC/OS –II demo program-with bootstrap
Replace EBIOS by μC/OS –II demo program
Burn back EBIOS through ICE
ANDES Confidential

11. U-boot serial_init> baudrate: 38400
U-Boot (May :32:00)
ANDES maintain version Clock:83MHz
ANDESboot code: > 0002db1c
DRAM Configuration:
Bank #0: KB
ID1:890089, ID2:180018
Find Intel flash
Flash: 32 MB
NDS32>help
ANDES Confidential

12. U-boot command ANDES Confidential NDS32>help ? - alias for 'help'
autoscr - run script from memory
base - print or set address offset
bdinfo - print Board Info structure
boot - boot default, i.e., run 'bootcmd'
bootd - boot default, i.e., run 'bootcmd'
bootm - boot application image from memory
bootp - boot image via network using BootP/TFTP protocol
cmp memory compare
coninfo - print console devices and information
cp memory copy
crc checksum calculation
echo - echo args to console
erase - erase FLASH memory
flinfo - print FLASH memory information
go start application at address 'addr'
help - print online help
iminfo - print header information for application image
imls - list all images found in flash
itest - return true/false on integer compare
loadb - load binary file over serial line (kermit mode)
loads - load S-Record file over serial line
loady - load binary file over serial line (ymodem mode)
loop - infinite loop on address range
md memory display
mm memory modify (auto-incrementing)
mtest - simple RAM test
mw memory write (fill)
nfs boot image via network using NFS protocol
nm memory modify (constant address)
printenv- print environment variables
protect - enable or disable FLASH write protection
rarpboot- boot image via network using RARP/TFTP protocol
reset - Perform RESET of the CPU
run run commands in an environment variable
saveenv - save environment variables to persistent storage
setenv - set environment variables
sleep - delay execution for some time
tftpboot- boot image via network using TFTP protocol
usb USB sub-system
usbboot - boot from USB device
version - print monitor version
NDS32>
ANDES Confidential

13. Lab : EBIOS <-> U-boot
Compiler/build u-boot source code
Download u-boot image and replace EBIOS
Bootup EVB and verify the result
ANDES Confidential

14. Standalone Program on Loader
Demo Program:
Demo shrinking function : printf -> sio_printf
Standalone program on u-boot/EBIOS…
Once execute this program, loader will jump to this program.
Create own stack
Explain interrupt mechanism and timer interrupt demo
ANDES Confidential

15. Standalone Program Procedure Analysis
text/code
Loader boot up
Download program
Execute program
data
AndesCore 0x 0x 0x 0x
DRAM
Flash 0x
SD,UART…..
AHB/APB
BUS
ANDES Confidential

16. shrinking Printf (sio-printf) and calculate Code Size
sio_printf code size: 0x3C4 bytes in Andes platform
Add Compiler parameter –Os : 0x9928 B->0x7452 B
Edit demo.text
sio_printf (0x48 B)
sio_vprintf (0x1D8 B)
ltoa (0x134 B)
sio_puts (0x34 B)
sio_putc (0x3C B)
ANDES Confidential

17. Standalone Program Explanation
Interrupt:
Internal VIC mode
HW1(LCvector)-> HW1_dispatch_ISR(HandleUndef)-> Timer_Initialize-> IRQInstall(19, timer_ISR); // bit 19 for timer 1
Output:
demo: ELF file format executable file.
demo.bin: Binary format executable file.
demo.map: symbols and address.
demo.text: executable header information and dis-assambly codes.
exampleC.ld: complete example of linker script.
ANDES Confidential

18. U-boot network display
TFTP server setup
DS32>
NDS32>
NDS32>printenv
bootdelay=3
baudrate=38400
netmask=
ethaddr=00:41:71:99:00:1F
serverip=
gatewayip=
ipaddr=
Environment size: 134/ bytes
ANDES Confidential

19. U-boot network update and save
Environment size: 134/ bytes
NDS32>
bootdelay=3
baudrate=38400
netmask=
ethaddr=00:41:71:99:00:1F
serverip=
gatewayip=
ipaddr=
NDS32>setenv gatewayip
NDS32>setenv serverip
NDS32>saveenv
Saving Environment to Flash...
env_flash.c[317]: adr: 805C0000h len h
Un-Protected 1 sectors
Erasing Flash...Erasing sector ok.
Erased 1 sectors
Writing to Flash
....
done
Protected 1 sectors
ANDES Confidential

20. Check parameters and program Download via TFTP
Bank #0: KB
ID1:890089, ID2:180018
Find Intel flash
Flash: 32 MB
NDS32>printenv
bootdelay=3
baudrate=38400
netmask=
ethaddr=00:41:71:99:00:1F
ipaddr=
serverip=
gatewayip=
Environment size: 132/ bytes
NDS32>tftpboot 0x demo.bin
ADDR: 00:41:71:99:00:1f
TFTP from server ; our IP address is
Filename 'demo.bin'.
Load address: 0x500000
Loading: ##
done
Bytes transferred = 7452 (1d1c hex)
no auto boot ...
ANDES Confidential

21. Execute Program ANDES Confidential NDS32>go 0x00500000
## Starting application at 0x
This is standalone program sample for Andes' EVB
Setup System Timer
Start while loop to print the System Timer:
1 Seconds Passed
2 Seconds Passed
3 Seconds Passed
4 Seconds Passed
5 Seconds Passed
6 Seconds Passed
7 Seconds Passed
8 Seconds Passed
9 Seconds Passed
10 Seconds Passed
11 Seconds Passed
12 Seconds Passed
13 Seconds Passed
14 Seconds Passed
15 Seconds Passed
16 Seconds Passed
17 Seconds Passed
18 Seconds Passed
ANDES Confidential

22. Lab : standalone program
Compiler/build standalone program
Download standalone program via tftp
Execute standalone program on EVB board
Show time program but without accuracy
Update to accuracy
ANDES Confidential

23. End of The File
ANDES Confidential