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AIDA design review 12 May 2008 Davide Braga Steve Thomas

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1 AIDA design review 12 May 2008 Davide Braga Steve Thomas
ASIC Design Group 12 May 2008

2 Overview Low Energy Channel: pulsed reset High Energy Channel: drive strength pulsed reset Diode Connection

3 Pulsed Reset (Low Energy Channel)
shaper reset: switch to a shorter shaping time (~1/20) preAmplifier reset: activates a low impedance feedback path to discharge the feedback capacitor Cf DC fdbk

4 Pulsed Reset (Low Energy Channel)
time [μs]

5 Pulsed Reset (Low Energy Channel)
When shaper and preamp are reset at the same time: reset time <2us from shaper peak (1.7us to 0.1% accuracy) (<3us from signal's arrival, with tshaping_time=0.6us)

6 Pulsed Reset (Low Energy Channel)
charge injection When the reset is released there is an unavoidable charge injection. The low frequency feedback responds too slowly for the shaper.

7 Pulsed Reset (Low Energy Channel)
The existing shaper architecture saturates for one polarity because of the undershoot caused by the preamp reset: it cannot be reset until it has recovered from this condition. A new rail to rail shaper is a more solid architecture, moreover it allows the use of the same reference voltage for both polarities and has lower power consumption. saturation recovery

8 High Energy Channel: drive strength
The output stage of the preamplifier (nMOS source follower) is asymmetrical: Pull-down strength (hole collection): the maximum current is limited Pull-up strength (electron collection): output current virtually unlimited, can match the input one Input pulse: 20GeV, 50ns, Ipk=17.5mA

9 High Energy Channel: drive strength
Switching between nMOS & pMOS source follower is not possible because the latter cannot drive the output below ~1V The drawback of unlimited current in one direction is the possible appearance of huge current spikes from/towards vdd/gnd → crossover & self-triggering The h+ collection time is likely to be longer than the e-, so the fast pull-up preamp should be able to cope with the fast e- signal, while the slower rise time of the other configuration should be mitigated by the longer h+ collection time.

10 High Energy Channel Input current parameterized
With a steady output current of ~5mA→no slew rate limitation for t input> 350ns (figure strongly dependant on rise time)

11 High Energy Channel: Pulsed Reset
The big feedback capacitor stabilizes the amplifier during the reset Reset time<0.5us

12 Diode connection Bypass switch activated by comparator with selectable threshold (see AIDA design study 09/06) Trade-off between charge injection (small transistor) and low offset (big t.)

13 Diode connection reset LEC reset HEC LEC preAmp saturates


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