1. CSE598A Analog Mixed Signal CMOS Chip Design
FM Mixer CMOS Realization
(Final Presentation)
Zhang Yi

2. CSE598A Analog Mixed Signal CMOS Chip Design
Outline:
Summary of Mixer Design
Final results in Project
Further study

3. Mixer ‘s Function in RF system
CSE598A Analog Mixed Signal CMOS Chip Design
Mixer ‘s Function in RF system
Down conversion in receiver
Realize Gilbert Mixer by CMOS Technologies

4. Mixer ‘s Function in RF system
CSE598A Analog Mixed Signal CMOS Chip Design
Mixer ‘s Function in RF system
Critical points of Mixer:
Image Frequency
Conversion Loss
Noise Figure
Intermodulation Distortion
Port-to-Port Isolation

5. Realize Gilbert Mixer by CMOS Technologies
CSE598A Analog Mixed Signal CMOS Chip Design
Realize Gilbert Mixer by CMOS Technologies
Intermodulation Distortion
1dB Compression point
Critical points of Mixer:
Image Frequency
Conversion Loss
Noise Figure
Intermodulation Distortion
Port-to-Port Isolation

6. Final schematic in Project

7. Output improved Convert differential to singled ended
vout RF RI - + v- v+
vout=Rf/Ri(v+-v-)

8. Optimized results in Project
Schematic determined from calculation:
Transistor size: 250u/600n
Rs and Rload: Rs=0(ohm) Rload=500ohm
RF and LO source: RF=0.05sin(w1t), LO=0.05sin(w2t)

9. IF signal from Gilbert cell

10. Single tone simulation
Simulation results:
Conversion gain
Isolation

11. Multi-tone simulation
Modulated signal spectrum
Modulated signal

12. Conclusion based on simulation
Width Vs conversion gain: LO input transisters’ width affect the conversion gain. RF input transisters’ width doedn’t affect the conversion gain.
IM3 point -overdrive voltage Vs power consumption: Need further study.
Rs Vs linearity: Rs doesn’t affect the linearity much at relative low frequency.

13. Difference between Expected and Actual
CSE598A Analog Mixed Signal CMOS Chip Design
Difference between Expected and Actual
Design criteria and actual specification for the mixer
Parameter
Expected Specification
Actual Specification
Units
Frequency
150
>150
MHz
Noise Figure (DSB)
<10
<20 dB
IM3 Intercept Point (Input)
>20
dBm
Voltage Gain
>8
Power consumption
<100
<80
ohms
Source impedance 50
Load impedance
500
Voltage Supply
3.0
3.3 V
Further modify the circuit to reach all design criteria

14. Further Study Further study on Intermodulation performance.
Further study on power dissipation.