1. Automatic selection of instruction op-codes of low-power core processors
L. Benini, G. DeMicheli Stanford University, USA A. Macii, E. Macii, M. Poncino Dipdi Automatica e Informatic, Italy
IEE Proc.-Digit. & Tech. 1999

2. Outline Introduction Automatic selection of op-codes
Methodology
Applicability
Case study & Experiment
Conclusion

3. Introduction (1/3) Low-power is getting more important
Several architectural solutions are proposed
Modification of the processors’ organization
Careful design of memory and I/O subsystem
Proper choices of data representation
Adoption of dynamic power-management strategies
Exploitation of bus encoding/decoding techniques

4. Introduction (2/3)
This paper focuses on reducing dynamic power during instruction fetching and decoding, especially op-codes
Goal: minimize bit transitions, i.e., Hamming distance between the codes

5. Introduction (3/3) Hamming distance a = 10010 Hamming distance?
b = 10101 3
The principle is easy:
XOR the two numbers, then count the 1s
In this example, a XOR b = 00111

6. Methodology (1/4)
If there is K distinct op-codes, build a K*K matrix

7. Methodology (2/4)
Derive a weighted undirected graph GA(V, E, W) with |V| = K
The goal now becomes assigning to each vertex vi a binary code of length ceiling of log2K s.t. minimize this cost function:

8. Methodology (3/4) Example:
However, finding the optimal encoding is an instance of graph embedding problem, which is provably NP-hard

9. Methodology (4/4) Thus the authors proposed two heuristics:
Explicit: (more accurate) based on ILP
[19] “State assignment for low power dissipation” IEEE J. Solid State Circuits, 1995
Implicit: (less accurate) based on implicit representation of boolean and pseudo boolean functions by means of BDDs and ADDs
[20] “Re-encoding sequential circuits to reduce power dissipation” ICCAD, 1994

10. Applicability
It only takes single pass to pass legacy binaries through a filter that replace op-codes with the new, low-power ones
Little hardware and design overhead against ARM, which provides two different instruction sets

11. Case study (1/7)
MIPS R4000 has three instruction formats:

12. Case study (2/7)

13. Case study (3/7)

14. Case study (4/7)

15. Case study (5/7)
As for extended op-codes, apply a simple genetic local search algorithm similar to the Galops procedure by Olson and Kang
[27] “Low-power state assignment for finite state machines” IWPLD 1994.
Some other work
“Low-power state assignment techniques for finite state machines” ISCAS 2000.

16. Case study (6/7)

17. Case study (7/7)

18. Experimental Result

19. Conclusion Low-power attention on instruction fetching and decoding
Experiments show the proposed work can automatically select a near-optimal op-code assignment, both on special- and general-purposed machines