1. Chapter 2: Data Manipulation

2. Chapter 2: Data Manipulation
2.1 Computer Architecture
2.2 Machine Language
2.3 Program Execution
2.4 Arithmetic/Logic Instructions
2.5 Communicating with Other Devices
2.6 Other Architectures

3. Computer Architecture
Central Processing Unit (CPU) or processor
Arithmetic/Logic unit versus Control unit
Registers
General purpose
Special purpose
Bus
Motherboard

4. Figure 2.1 CPU and main memory connected via a bus

5. Stored Program Concept
A program can be encoded as bit patterns and stored in main memory. From there, the CPU can then extract the instructions and execute them. In turn, the program to be executed can be altered easily.

6. Terminology
Machine instruction: An instruction (or command) encoded as a bit pattern recognizable by the CPU
Machine language: The set of all instructions recognized by a machine

7. Machine Language Philosophies
Reduced Instruction Set Computing (RISC)
Few, simple, efficient, and fast instructions
Examples: PowerPC from Apple/IBM/Motorola
and SPARK from Sun Microsystems
Complex Instruction Set Computing (CISC)
Many, convenient, and powerful instructions
Example: Pentium from Intel

8. Machine Instruction Types
Data Transfer: copy data from one location to another
Arithmetic/Logic: use existing bit patterns to compute a new bit patterns
Control: direct the execution of the program

9. Figure 2.2 Adding values stored in memory

10. Figure 2.3 Dividing values stored in memory

11. Figure 2.4 The architecture of the machine described in Appendix C

12. Parts of a Machine Instruction
Op-code: Specifies which operation to execute
Operand: Gives more detailed information about the operation
Interpretation of operand varies depending on op-code

13. Figure 2.5 The composition of an instruction for the machine in Appendix C

14. Figure 2.6 Decoding the instruction 35A7

15. Figure 2.7 An encoded version of the instructions in Figure 2.2

16. Program Execution Controlled by two special-purpose registers
Program counter: address of next instruction
Instruction register: current instruction
Machine Cycle
Fetch
Decode
Execute

17. Figure 2.8 The machine cycle

18. Figure 2.9 Decoding the instruction B258

19. Figure 2. 10 The program from Figure 2
Figure The program from Figure 2.7 stored in main memory ready for execution

20. Figure 2.11 Performing the fetch step of the machine cycle

21. Figure 2.11 Performing the fetch step of the machine cycle (cont’d)

22. Arithmetic/Logic Operations
Logic: AND, OR, XOR
Masking
Rotate and Shift: circular shift, logical shift, arithmetic shift
Arithmetic: add, subtract, multiply, divide
Precise action depends on how the values are encoded (two’s complement versus floating-point).

23. Masking
AND

24. Figure 2.12 Rotating the bit pattern 65 (hexadecimal) one bit to the right

25. Logical shift
To discard the bit that falls off the edge and always fill the hole with a 0

26. Arithmetic shift
The way that do right shifts and fill the hole with its original value.

27. Solution of question 11 12A7(load) 2380(load) 7023(OR) 30A7(store)
c000

28. Solution of q12 15E0(load) A502(rotate 2bits right) 260F(load)
8056(AND)
30E1(store)
c000

29. Communicating with Other Devices
Controller: An intermediary apparatus( a collection of circuitry) that handles communication between the computer and a peripheral device
Specialized controllers for each type of device
General purpose controllers (USB and FireWire)
Peripheral device: Monitor, keyboard, mice, printer, mass storage system, digital cameras
Port: The point at which a device connects to a computer

30. Figure 2.13 Controllers attached to a machine’s bus

31. How does CPU handle communication?
Special I/O instructions
e.g. AARXY
AA store the contents of register R to Peripheral device location XY
Memory-mapped I/O: CPU communicates with peripheral devices as though they were memory cells

32. Figure 2.14 A conceptual representation of memory-mapped I/O

33. DMA
Direct memory access (DMA): Main memory access by a controller over the bus
DMA allows the CPU and controller work at the same time, so to save the waiting time of CPU.
Von Neumann Bottleneck: Insufficient bus speed impedes performance

34. Handshaking
Handshaking: The process of coordinating the transfer of data between components
Status word: a bit map in which the bits reflect the conditions of the device
Take the status word between a printer and computer as an example.

35. C->P: Hey, wake up
P->C: Wait, I will need some time…
P->C: OK, I am ready.
C->P: I am sending a 10MB file to you.
P->C: OK, I can accommodate 2 MB one time, fire away!
C->P: This is the first 2 MB.
P->C: I have received the first 2 MB file and printing it.
P->C: OK, I am ready to receive the second 2 MD file
…..

36. Communicating with Other Devices (continued)
Parallel Communication: Several communication paths transfer bits simultaneously.
The transmission distance can not be long, otherwise, the signals will be lost.
Serial Communication: Bits are transferred one after the other over a single communication path.
..can transfer long distance

37. MODEM
To transfer the digital data over voice line, we need MODEM to convert digital signals to voice tones (analog signal). And, the MODEM of receiver side will convert analog signals back to digital data.

38. DSL Digital subscriber line
Take the high frequency of spectrum to send data while leave the lower frequency part of spectrum to voice transfer
非對稱數位式用戶線路( Asymmetric Digital Subscriber Line )
Other Broadband service: cable television system, satellite…

39. Data Communication Rates
Measurement units
Bps: Bits per second
Kbps: Kilo-bps (1,000 bps)
Mbps: Mega-bps (1,000,000 bps)
Gbps: Giga-bps (1,000,000,000 bps)
Bandwidth: Maximum available rate

40. Other Architectures Technologies to increase throughput:
Pipelining: Overlap steps of the machine cycle
Parallel Processing: Use multiple processors simultaneously
SISD: No parallel processing
MIMD: Different programs, different data
SIMD: Same program, different data

41. SISD

42. SIMD
Several CPU execute same program, but handling different data, E.g. Tax data processing

43. SIMD

44. MIMD
MIMD: slice the program into several smaller programs and ask other CPU to execute them.

45. MIMD

46. dual-core CPUs

47. Gates and Jobs Bill Gates The founder of Microsoft Inc. Steve Jobs
The founder of Apple Inc.