1. Transistors and Logic Circuits

2. Transistor voltage in control high allows current to flow --
switch is closed (on)
control low stops
current flow
switch is open (off)
control
voltage out

3. NOT Gate One transistor
V (high voltage) 1 1
Out In
In = high, switch is closed
so current flows to ground
Out is low.
In = low, switch is open
so current flows to Out
Out is high.

4. NOR Gate Two transistors
V (high voltage)
Out
In 1
In 1 = 1, Out = 0
In 2 = 1, Out = 0
In 2
In 1 = 0
In 2 = 0, Out = 1

5. NAND Gate Two transistors
V (high voltage)
Out
In 1
In 1 = 1,
In 2 = 1, Out = 0
In 2
In 1 = 1
In 2 = 0, Out = 1

6. AND Gate Three transistorsV
V (high voltage)
Out
In 1
In 2

7. Logic Gates In 0 1 Out AND Gate In 0 1 Out OR Gate In 0 1 Out XOR Gate
NOT Gate In
Out

8. Logic Circuit -- 4 input Multiplexor 1
Out 2 3 In
Control

9. Logic Circuit Puzzle 1 8 bit Comparator Output 1 if A = B Otherwise 0
Input
Binary
Numbers
A, B A1 B1 A2 B2
Out A3 B3 A4 B4 A5 B5
8 bit Comparator
Output 1 if A = B
Otherwise 0 A6 B6 A7 B7

10. Logic Circuit Puzzle 2 3 bit Decoder Select Output Line D0 D1 In 2 D2

11. Programmable Logic Array
Any Logic Truth Table can be implemented
Uses block of AND gates followed by block of OR gates
Programmable
once
many times
Used for implementing different circuits

12. Truth Table to Normal Form
A B C expression
A and B and C
A and B and ~C
A and ~B and C
~A and B and C
(A and B and C) or (A and B and ~C)
or (A and ~B and C) or (~A and B and C)

13. PLA
Input
AND Gates
Output
OR Gates

14. PLA
In 0
In 1
In 2
What is Out 1?
Out 0
Out 1

15. Normal Form to Truth Table
A B C expression
A and B and C
Odd Parity
A and ~B and ~C
~A and B and ~C
~A and ~B and C
(A and B and C) or (A and ~B and ~C)
or (~A and B and ~C) or (~A and ~B and C)

16. PLA, Alternate Representation
AND Block uses DeMorgan Equivalence
A and B = not (not A or not B) V
OR Block uses direct or

17. PLA, Alternate Representation
Unused A B C
Outputs 1 2
Unused 3

18. PLA, Alternate Representation
Burned out to disconnect

19. PLA "Don't Cares" A B C exp A B C exp 1 1 1 1 1 1 X 1 1 1 0 1 1 0 1 1
A B C exp
X 1
X = Don't Care

20. PLA "Don't Cares" Reduce number of PLA lines used for expression A B C