1. Introduction HV HR CMOS ATLAS R&D
A.Rozanov
Reunion CEA-CPPM
HV HR ATLAS CEA-CPPM

2. A.Rozanov AUW CMOS session 4.11.13
HV-CMOS
N-well in the P substrat where CMOS transistors are implanted (for example first stage of the amplifier)
CMOS! e.g. 1st stage amplifier
n-well in p-substrate diode
n-well biasing
depletion zone around nwell: charge collected by drift
resist~10Ω.cm
A.Rozanov AUW CMOS session

3. HV CMOS AMS 180nm HV2FEI4 - CCPD
2.2x4.4 mm2, 60 colx24 rows, pixel 33x125 um
CCPD_V1 - tested, irradiated protons and X-rays, test beam electrons at DESY, not radhard
common pixel and strips prototype
CCPD_V tested, irradiated X-Rays
CCPD_V received, tested electrically, to be irradiated X-rays June-August 2014, proton irradiations November 2014
CCPD_V x2.76mm2 chip 25 May 2014, rad hard 33x125 um chess or linear patterns, with amplitude or time coding, new pixels 25x125 um with cross sensor-electronics layout, analog pixels 25x350 um without discriminators
HR option (few kohms cm) end 2014/begin 2015 ????
HV HR ATLAS CEA-CPPM

4. A.Rozanov AUW CMOS session 4.11.13
HV2FEI4_V2
Few pixel flavors with enhanced rad-hardness: guard rings, circular transistors… (different pixel types lead to different gains -expected-).
55Fe spectra, unirradiated
“rad-hard”
“normal”
different gains
A.Rozanov AUW CMOS session

5. A.Rozanov AUW CMOS session 4.11.13
Sr-90 at HV=30V
A.Rozanov AUW CMOS session

6. A.Rozanov AUW CMOS session 4.11.13
HV curent vs Dose
After each 100 Mrad apply 2 hours of 70° C annealing
After 5 days room temp annealing the current I=590 nA
After 6 days and one row selection I=465 nA
A.Rozanov AUW CMOS session

7. A.Rozanov AUW CMOS session 4.11.13
HV2FEI4 V2
After 862 MRad Xray (annealing of 2h at 70° C each 100MRad), after parameter retuning, amplifier gain loss recovered to 90% of initial value
Relative preampli amplitude variation as function of dose
Recovery at 862 MRad (NOT 900MRad)
A.Rozanov AUW CMOS session

8. Threshold measurement with S-curve
Produce S-curve by vary the injection pulse from zero to 1 V. 50% point on S-curve defines the threshold point.
Pixel col2xrow1
Dose= 0.5 Mrad
Thresh= 324 mV
Noise = 63 mv
Pixel col2xrow1
Dose= 862 MRad
Thresh=367 mV
Noise = 81 mv
A.Rozanov AUW CMOS session

9. Injection 1V signal after 862 MRad
Both RadHard and Normal pixels works
RadHard pixel col2 row 1
Normal pixel col29 row 1
A.Rozanov AUW CMOS session

10. Normal pixel after 862 MRad
pix 29x1 Sr90 signals seen, Fe55 only weak Amp
Sr90 signal
Fe55 signal
A.Rozanov AUW CMOS session

11. RadHard pixels after 862 MRads.
Sr90 and Fe55 signals seen !!!
Enable row 1 only, pix col2xrow1
Sr90 signal
Fe55 signal
A.Rozanov AUW CMOS session

12. HitMap C09 after noise suppression and single hit in ref plane
A.Rozanov

13. Efficiency corrected versus FEI4 column
Threshold vary from 1150 e in column-2 to 750 e in column 12
A.Rozanov

14. Priorities HV2FEI4 AMS Test CCPD_V3 Irradiation CCPD_V3 (Xray+protons)
CCPD_V2 Low temperature before and after irradiation – does it reduce the noise ?
Try to tune V2 and V3 to lowest possible threshold, ~100 mV , 500 e
If V2 with 500 e possible try CERN beam
HV HR ATLAS CEA-CPPM

15. GF 130nm BCDLite CMOS
Good radiation tolerance up to 800 Mrads proved on FE-C4 prototypes
Interesting prototype GF-HV2FEI4-CCPD under tests
Standard commercial offer has too low resistivity
Prospects for High Resistivity wafer in discussions, if yes, submission in 2014
HV HR ATLAS CEA-CPPM

16. New technologies and chips
LFoundry 150nm HR – Submission in May CPPM-Bonn-Heidelberg
AMS 350nm High Resistivity April 2014 , mainly Strips (radiation hardness for pixels????), submission done in April 2014, Heidelberg-Geneva
Tower Jazz – transistor irradiation in preparation, porting the chip ????
XFAB XT1018 HV SOI 180nm with 100 ohm cm substrate , ~40 um depletion, Transistors under irradiation at Bonn, Heidelberg+Bonn+CPPM????
Large chip in AMS 350 nm, cheap ????
Large chip in AMS 180 nm with DEPFET Mu3e
HV HR ATLAS CEA-CPPM

17. Pixel and Strip ATLAS CMOS R&D
Number of Institutes: 15
Number of Researchers: 73
2.5 years (from ) of weekly CMOS meetings Tuesday 17:00 started by Bonn-Berkley-CERN-Geneva-Heidelberg-Marseille
Strip task force INDICO:
HV HR ATLAS CEA-CPPM

18. Two goals for pixels
Middle term : CMOS sensor capacitive coupled to FE-I4-B with sub-pixel pitch (actual 33x125 um, options 25x125 um, 50x50 um). To achieve: 99% efficiency, low noise (less than 1% masked pixels), 25 ns time-walk, decoding of sub-pixel address on full area 2x2 cm, at least 300 MRad tolerance. Main goal is to demonstrate a working system. Explore low cost producers (HV or HR), glue contact as well as producers with higher costs, bump-bonding (with AC in the chip) instead of glue.
Long term : CMOS sensor coupled to new digital tier (FE65 or FEI4-C) (capacitive CCPD or low cost wafer bonding with TSVs) or integrated MAPS in one tier. Radiation tolerance up to 1000 MRad. Low cost, massive and reliable CMOS production facilities.
HV HR ATLAS CEA-CPPM

19. List of pixel tasks for middle term 2014-2015
CMOS Pixel Sensor: Design and fabrication of full FE-I4 size (or half size) HV-CMOS sensor and HR-CMOS to be coupled to FE-I4 chips. This includes survey of available processes and TCAD simulations of the CMOS sensors.
Coupling: Prototyping of coupling methods. Chip-chip, wafer-wafer, AC or DC. This includes a survey of available foundry capabilities and costs. This includes investigation of TSV.
Irradiation: Measurement and study of radiation hardness, charge collection efficiency and in-time collection efficiency of available CMOS prototypes (neutrons, X-rays, protons).
CMOS Pixel Module: Development of module concept for I/O and power interconnect and how to include control of the CMOS part. This includes mechanical aspects of power and cooling.
HV HR ATLAS CEA-CPPM

20. Continuation of list of pixel tasks for middle term 2014-2015
Testing: Electrical and source tests in the lab, test-beams DESY, SLAC and CERN, PCB and test system developments, software DAQ and monitoring
G4 Simulation: Simulation of benefits of CMOS solution for pixels. What CMOS pixel size is needed? LoI simulations proved interest of 25x150 um pitch for inner layers with sensor thickness of 150 um. We need simulations with reduced charge sharing with different ranges of sensor thickness um with digital clustering without analog charge pixel weighting. Choice between 33x125 um and 25x125 um (merging some rare combinations) to be simulated. Option of 50x50 um to be simulated for applications in disk and very forward tracking. Possible defects in charge collection efficiency and sub-pixel encoding should be simulated. For longer term one should investigated does sub-pixel encoding of 25x125 um pixels into 25x25 um bring any benefit with realistic sensor thickness.
HV HR ATLAS CEA-CPPM

21. List of pixel tasks for long term
Continuation of middle term tasks for low cost and large scale reliable production.
Digital input FE: New digital tier chip FE65 or FEI4-C optimized to CCPD or low cost 3D wafer integration
Explore CMOS sensors in 65 nm technology with small pixel pitch 25x25 um
Full MAPS: Prototyping of fully monolithic concepts. First small format, later full size.
HV HR ATLAS CEA-CPPM

22. List of strip tasks for middle term
StripSensor: Design and prototyping of large format strip-appropriate structure on 8” wafers. Either using stitching, post processing, or multi-chip pick and place assembly. Can be MAPS or diodes on high resistivity substrate.
G4 SimuStrips: Simulation of benefits of CMOS solution for strips. Number of hits problem (N 3D hit vs. 2N 2-D hits). Impact of mass. Z-position measurement precision needed
Irradiation, Module, Testing tasks similar to Pixel tasks, but may need specific additional manpower
PassiveStrips: Should we include in this ATLAS RD passive CMOS strips ???
HV HR ATLAS CEA-CPPM

23. Matrix of Interests Berkley B C A Bonn - CERN Geneva Heidelberg
CMOS PixelSensor
CMOS Strip semsor
Coupling
Irradiation
Testing
CMOS Pixel Module
CMOS Strip Module
G4 Simulation
Digital input FE
Full MAPS
Berkley B C A
Bonn -
CERN
Geneva
Heidelberg
Marseille
HV HR ATLAS CEA-CPPM

24. Matrix of Interests Goetingen C - B A Genova Prague Saclay DESY A?
CMOS PixelSensor
CMOS Strip semsor
Coupling
Irradiation
Testing
CMOS Pixel Module
CMOS Strip Module
G4 Simulation
Digital input FE
Full MAPS
Goetingen C - B A
Genova
Prague
Saclay
DESY A?
Glasgow
HV HR ATLAS CEA-CPPM

25. Matrix of Interests Santa Cruz A? Liverpool B? Barcelona Liubliana A -
CMOS PixelSensor
CMOS Strip semsor
Coupling
Irradiation
Testing
CMOS Pixel Module
CMOS Strip Module
G4 Simulation
Digital input FE
Full MAPS
Santa Cruz A?
Liverpool B?
Barcelona
Liubliana A -
HV HR ATLAS CEA-CPPM

26. Relations with beyond ATLAS efforts
RD50 can contribute on sensor part of CMOS, complementary to our ATLAS RD effort on micro electronics. Contribution: sensor simulation, sensor design, sensor damage mechanisms, HTCT measurements. Example: explain HV current behavior, recommend solutions. Our chip designers should develop horizontal contacts with RD50 community.
RD53 can contribute to new digital tier compatible and optimized for CMOS pixel sensors. For example: multiple capacitive pads receivers of CCPDs. We should take active part in RD53 CMOS digital input part.
Analogue design of the CMOS tier or integrated MAPS. Design community is available in RD53, but outside of the approved RD53 scope. If RD structure outside ATLAS is needed: either increase the scope of RD53, or new RD
AIDA-2 Expression of Interest Bonn-Marseille-Heidelberg-CERN-Geneva and many other institutes: Genova-Barcelona-Glasgow-Saclay-Liverpool-CERN-LCD-KIT-Milano-Munich-Oxford-RAL-Sheffield. Working group creation agreed for AIDA-2 proposal with 3 tasks: Simulation, Sensor Development, Hybridization (~.7 MEuros AIDA-2+50% national matching)
National projects (Germany, France, Suisse, Italy etc)
Other EU 2020 projects ???
HV HR ATLAS CEA-CPPM

27. Full MAPS efforts
IBM 130nm based on Tripple Well (T3) structure full MAPS by LBNL in 2013
ESPROS High Resistivity in 2013 by Bonn
Several other High Resistivity full MAPS proto in four foundries by Bonn
To be continued for long term, but difficult to expect pragmatic solutions in middle term
HV HR ATLAS CEA-CPPM

28. Organization
TWiki site including proposal:
Share point site (very recent):
HV HR ATLAS CEA-CPPM