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Block diagram of a Microcoded Control unit

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1 Block diagram of a Microcoded Control unit
Starting address from opcode Clk Other External source 4 to 1 mux for choosing the source of micro-PC Microprogram Controller MUX Inc Branch Address Micro-PC Microprogram Memory Micro-Branch Control Micro-IR Control Signals

2 Review

3 CS501 Advanced Computer Architecture
Lecture22 Dr.Noor Muhammad Sheikh

4 Block diagram of a Microcoded Control unit
Starting address from opcode Clk Other External source 4 to 1 mux for choosing the source of PC Microprogram Controller MUX Holds the address of next micro-instruction Inc Branch Address Micro-PC Microprogram Memory Micro-Branch Control Micro-IR Control Signals

5 Block diagram of a Microcoded Control unit
Starting address from opcode Clk Other External source 4 to 1 mux for choosing the source of PC Microprogram Controller MUX Holds the address of next micro-instruction Inc Branch Address Micro-PC Microprogram Memory Micro-Branch Control contains control words Micro-IR Control Signals

6 Block diagram of a Microcoded control unit
Starting address from opcode Clk Other External source 4 to 1 mux for choosing the source of PC Microprogram Controller MUX Holds the address of next micro-instruction Inc Branch Address Micro-PC Microprogram Memory Micro-Branch Control contains control words m b Holds current micro-instruction Micro-IR Control Signals

7 Fields in the micro-instruction
Micro-IR

8 Fields in the micro-instruction
Micro-IR c bits control signal field m bits branch address field b bits branch control field

9 Loading the micro-PC Simple increment Lookup table External source
The micro-PC can be loaded from one of the four possible sources Simple increment Lookup table External source Branch address

10 Microprogram Memory contains micro-routines for all the instructions in the ISA Input: address Output: control word Faster, smaller

11 Layout of a typical microprogram memory
Micro- Address Memory Contents Microcode for instruction fetch Microcode for load instruction Microcode for add instruction Microcode for br instruction 2n-1 Microcode for reset instruction Layout of a typical microprogram memory

12 Example: Control Signals for the sub Instruction
100 1 101 102 203 204 205 Branch Control Address PC out Cout Cout R2Bus LMAR LC LPC LIR LA Bus2R INC4 Read LMBR MARout SUB RAE RBE RCE END

13 Example: Control Signals for the sub Instruction
100 1 101 102 203 204 205 Branch Control Address PC out Cout Cout R2Bus LMAR LC LPC LIR LA Bus2R INC2 Read LMBR MARout SUB RAE RBE RCE END Microcode for instruction fetch

14 Example: Control Signals for the sub Instruction
100 1 101 102 203 204 205 Branch Control Address PC out Cout Cout R2Bus LMAR LC LPC LIR LA Bus2R INC2 Read LMBR MARout SUB RAE RBE RCE END Microcode for instruction fetch Microcode for sub instruction

15 Branching Controls in Microcontroller
Neg flag Zero flag N Z 2 External Address Branch Address 2 From IR Brn 2 2 MUX Brp inc 2 Brz 2 Micro-PC Brnz MicroController Branch Microprogram Memory MUX Control Control Signals BR 2 ….

16 4-1 Multiplexer External Address Branch Address The multiplexer supplies one of the four possible values to the micro-PC From IR 2 MUX Mux Control inc Mux Control Select 00 Increment micro-PC 01 Opcode from IR 10 External address 11 Branch address Micro-PC

17 Normal flow of execution
4-1 Multiplexer External Address Branch Address The multiplexer supplies one of the four possible values to the micro-PC From IR 2 MUX Mux Control inc Mux Control Select 00 Increment micro-PC 01 Opcode from IR 10 External address 11 Branch address Micro-PC Normal flow of execution

18 4-1 Multiplexer External Address Branch Address The multiplexer supplies one of the four possible values to the micro-PC From IR 2 MUX Mux Control inc Mux Control Select 00 Increment micro-PC 01 Opcode from IR 10 External address 11 Branch address Micro-PC Normal flow of execution Initial loading of microroutine

19 4-1 Multiplexer External Address Branch Address The multiplexer supplies one of the four possible values to the micro-PC From IR 2 MUX Mux Control inc Mux Control Select 00 Increment micro-PC 01 Opcode from IR 10 External address 11 Branch address Micro-PC Normal flow of execution Initial loading of microroutine For resetting etc.

20 4-1 Multiplexer External Address Branch Address The multiplexer supplies one of the four possible values to the micro-PC From IR 2 MUX Mux Control inc Mux Control Select 00 Increment micro-PC 01 Opcode from IR 10 External address 11 Branch address Micro-PC Normal flow of execution Initial loading of microroutine For resetting etc. Implementing conditional & unconditional branches

21 How to form a branch Condition unconditional not zero zero positive
negative Address From IR External Address Branch Address

22 Microcode branching Examples

23 Microcode Branching Examples
Action Equivalent C construct 200 00 xxx No branch,goto next address in sequence-201 {…}; 201 01 1 To the address supplied by opcode {…}; goto initial address; 202 10 To external address if Z flag is set {…}; if Z then goto Ext. Add. 203 11 To 300 if N flag is set, else to 204 {…}; if N then goto Label1; 204 000 406 To 206 if N is false, else to 205 While (N) {...}; 205 404 Branch to 204 While contd… Control Signals Branch Address Address Mux control Branch brnz brz brp brn

24 Horizontal microcode scheme
Microprogram Memory Micro-PC ….. Cin PCout INC2

25 Vertical Microcode Scheme
Microprogram Memory Micro-PC DataPath n to 2n decoder PCout INC2

26 Microcoded 1-bus SRC design

27 A Unibus Data Path Implementation
General purpose registers (32-bits each) ALSU C A R0 R31 PC IR 32 lines <31..0> A Unibus Data Path Implementation MAR MBR add sub shl Other ALSU functions Internal processor bus R1 Repeat To external CPU bus

28 Hard wired control unit for the SRC
31 … 27 26…24 opcode ra Instruction register Repeat 0 NOP 5 to 32 decoder 1 LOAD 1 2 3 4 2 LOADR 3 STORE 4 STORER 5 LOADA 31 STOP Enable Logic ‘1’ bit 27 bit 31

29 Hard wired control unit for the SRC
Repeat ….. 31…27 26…22 21…17 16…12 11 IR opc ra rb rc Control signals to register file RAE 5 5 5 RCE RBE LR0 LR1 LR31 BUS2R ….. R0 R1 R31 R0out R0 5 5-to-32 decoder R1out R1 ….. R31out R31 R2BUS

30 Microcoded Control Unit for the SRC
Starting address from opcode Clk Other External source SRC Micro-controller MUX Inc Branch Address Micro-PC Microprogram Memory Micro-Branch Control Micro-IR Control Signals

31 The SRC Microcontroller
The microcontroller for the SRC microcoded control unit employs the logic for handling exceptions and reset process Since the SRC does not have any condition codes, we use the CON and n signals instead of N and Z flags to control branches

32 The SRC Microcontroller
2 External Address Branch Address 2 From IR 2 2 4-1 MUX 2 2 inc MicroController Micro-PC MuxControl Branch Br(CON=0) Br(n=1) Br(n=0) END

33 Microcode for some SRC instructions

34 The shl Instruction The signals for instruction fetch are not shown here as they are same for all instructions RTL 300 00 xxx n IR<4…0>; 301 11 1 303 n!=0:Micro-PC ; 302 N R[rc]<4…0> C R[rb]; 304 306 n=0:Micro-PC 305 C<31..0>0C<31..1>,n n-1, Micro-PC 304 100 R[ra] C; Micro-PC ; Branch Address MuxControl Branch Br(CON=0) Br(n=1) Br(n=0) End PCout LMAR Control Signal

35 Alternative approaches to microcoding
Bit ORing Nanocoding Writable Microprogram Memory Subroutines in Microprogramming


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