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ECE 875: Electronic Devices

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Presentation on theme: "ECE 875: Electronic Devices"— Presentation transcript:

1 ECE 875: Electronic Devices
Prof. Virginia Ayres Electrical & Computer Engineering Michigan State University

2 Lecture 32, 31 Mar 14 Chp 06: MOSFETs
pn junctions/Depletion regions (examples) Channel Current IDS (n-channel p-substrate) VM Ayres, ECE875, S14

3 Chp. 04: MOS: Gate Chp. 03: Interconnect Chp. 01: Si Chp. 02: pn n-p-n
VM Ayres, ECE875, S14

4 Qs ys ys For examples: VGate Si @ r.t.
Substrate is p-type with NA = 4 x 1015 cm-3 Matches Fig. 4.5 Does not match Fig (b) Qs ys ys VGate VM Ayres, ECE875, S14

5 Example: What kind of pn junction is this: forward bias, reverse bias or equilibrium?
VM Ayres, ECE875, S14

6 Answer: Equilibrium: earth to earth. Continue Example: Find WD
VM Ayres, ECE875, S14

7 Answer: VM Ayres, ECE875, S14

8 Example: M-O-S depletion region is identified
Example: M-O-S depletion region is identified. Find full inversion. + VG -  gnd VM Ayres, ECE875, S14

9 VM Ayres, ECE875, S14

10 WD = WDmax = WDm for low frequency operation
VM Ayres, ECE875, S14

11 From Lec 31: Fig 4.8 (a): after strong inversion, increase Qm  increase Qn while QDep and therefore WD stay the same. Low frequency High frequency, Slow ramp High frequency, Fast ramp WDmax is bigger WDmax is biggest Qn layer; no time to form at all Qn smaller Qn biggest VM Ayres, ECE875, S14

12 n=channel p-substrate “knee” in Vfor  strong inversion.
For VG less than value for strong inversion: Can find ys(VG) as in Pr using equivalent of Fig 4.10 (b). Note: this is Fgi. 10 (b). C-V in Fig (a) shows that this  low frequency operation. ys VGate Warning: Fig is for NA = 1 x 1016 cm-3 not our example! VM Ayres, ECE875, S14

13 Example: Is there an electric field across the channel region?
Sub-question: “across” in which direction? + VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

14 First check coordinate system:
Chp. 04: MOS: Gate Chp. 03: Interconnect Chp. 01: Si Chp. 02: pn n-p-n VM Ayres, ECE875, S14

15 First check coordinate system:
Take “across”  Drain-Source: E (y)  “0” < y < length of channel L L z Width = Z y SiO2 x Width of gate/ charge sheet under gate in a MOSFET is called “Z”. It is a dimension in e.g., cm. Don’t confuse with atomic number. VM Ayres, ECE875, S14

16 Answer: Yes. There are (different) electric fields in both the y and x directions.
+ VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

17 E (y) is due to the potential drop across the channel:
Answer: E (y) is due to the potential drop across the channel: e-’s move by F = q E (y) drift motion in the channel. + VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

18 Example: Is the shaded region an E (y) -field region or a pn junction depletion region?
+ VG -  gnd VM Ayres, ECE875, S14

19 Answer: Mixed. May have different field properties than channel.
See Pr + VG -  gnd VM Ayres, ECE875, S14

20 Same here, see Pr. 02. + VG -  gnd VM Ayres, ECE875, S14

21 Note that Qn = Qn(y) in the Fig.
+ VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

22 Example: What kind of pn junction is this: forward bias, reverse bias or equilibrium? Assume VDS is on, as shown. + VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

23 Answer: Reverse bias. Continue Example: Find WD for Vrev = -6V.
+ VG -  gnd + VDS -  gnd VM Ayres, ECE875, S14

24 Answer: VM Ayres, ECE875, S14

25 Answer: Drain pn junction with VDS on Source pn junction with VDS on
VM Ayres, ECE875, S14

26 The bigger depletion region at the Drain end leads to a physical pinch, which leads to saturation current. IDS  free Qn . Qn  Qn(y) VM Ayres, ECE875, S14

27 Lecture 32, 31 Mar 14 Chp 06: MOSFETs
pn junctions/Depletion regions (examples) Channel Current IDS (n-channel p-substrate) VM Ayres, ECE875, S14

28 Channel current IDS Units-based guess:
Need a length. Multiply by channel length L or channel width Z? ? VM Ayres, ECE875, S14

29 Channel current IDS Units-based guess:
Need a length. Multiply by channel length L or channel width Z? ? Answer: IDS = Z Qn vel => dIDS = Z dQn(y) vel(y) some dy then IDS =Sum up (integrate) dIDS VM Ayres, ECE875, S14

30 Charge sheet model: to deal with Qn(y)
Constant mobility model: to deal with vel(y) VM Ayres, ECE875, S14

31 Result of Charge sheet model:
Result of constant mobility model: VM Ayres, ECE875, S14

32 Result of Charge sheet model:
VM Ayres, ECE875, S14

33 Example: VM Ayres, ECE875, S14

34 Channel width Z changes, channel length L stays the same
Therefore: You fabricated a new device with a different gate dimension. VM Ayres, ECE875, S14

35 Example: For the new device, Z = ? to do the specified job.
VM Ayres, ECE875, S14

36 Answer: Given: device 01 is a “Square” MOSFET: Length L = width Z
VM Ayres, ECE875, S14

37 Answer: Did not change the Drain or Gate batteries as well as the gate length VM Ayres, ECE875, S14

38 Answer: VM Ayres, ECE875, S14

39 Answer: Dividing info from two readings to get rid of common unknowns is a standard approach. VM Ayres, ECE875, S14


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