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OpenPower 25Gbps Preliminary Reference Channels’ Details

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Presentation on theme: "OpenPower 25Gbps Preliminary Reference Channels’ Details"— Presentation transcript:

1 OpenPower 25Gbps Preliminary Reference Channels’ Details
Jose A. Hejase & Dan Dreps

2 Channel Topologies

3 Channel Topology (1) : IBM is Tx
Vendor Module Topdrilled Capacitor Via Topdrilled Megarray PCB via IBM Module Vendor Card LGA Connector (2:1) module PCB via 10nF capacitor Megarray Connector IBM Card Backdrilled module PCB via Backdrilled Megarray PCB via Note: Channels provided include IBM Package to Vendor Module PCB Via (i.e. vendor module is not included in model) 1.5 inch pin area wiring + 6 inches open area wiring on IBMC = 7.5 inches of Very Low Loss TU883 material (Meg6 like material) 2inches of low loss EM888 material on Nvcard (Meg4 like material) -- 1inch before capacitor and 1inch after capacitor Case1: capacitor pads with no voids below them Case2: capacitor pads with voids below them Case 3: no capacitor; no capacitor vias; (direct connection betweel topdrilled megarray pcb via and module pcb via)

4 Channel Topology (2) : IBM is Rx
Vendor Module Capacitor Via Megarray PCB via IBM Module Vendor Card LGA Connector (2:1) 10nF capacitor Backdrilled module PCB via Megarray Connector IBM Card Backdrilled module PCB via Backdrilled Megarray PCB via Note: Channels provided include IBM Package to Vendor Module PCB Via (i.e. vendor module is not included in model) 1.5 inch pin area wiring + 6 inches open area wiring on IBMC = 7.5 inches of Very Low Loss TU883 material (Meg6 like material) 2inches of low loss EM888 material on Nvcard (Meg4 like material) -- 1inch before capacitor and 1inch after capacitor Case1: capacitor pads with no voids below them Case2: capacitor pads with voids below them Case 3: no capacitor; no capacitor vias; (direct connection between topdrilled megarray pcb via and module pcb via)

5 IBM Module Topology Details - for both topologies (1) & (2) -

6 IBM Module IBM Module RFP Via micro Vias to LGA
 C4 escape (3mm length): 20um line width - 25um intra pair separation - 25um pair to pair separation  C4 open area (35mm length): 31um line width - 41um intra pair separation - 71um pair to pair separation FC wiring only, no BC wiring No interleaving GZ41 material 6-2-6 package stackup

7 IBM Card Topology Details - for both topologies (1) & (2) -

8 IBM Card Vias Stack up Used
Note: This is a hybrid stackup with Material 1GHz TU-883(Dk=3.5, Df= at 1GHz) TU-865 (Dk=4.3, Df=0.011 at 1GHz) TU-883 laminate material (Meg6like) Breakout layer: S09 With backdrilling : stub length = 20mil Active via length = 1.143mm

9 Module PCB Via Pinout Antipad diameter  28mil
Drill diameter before plating  10mil

10 Megarray Conn PCB Via Pinout
Agg1 Agg8 Agg2 Agg3 Agg7 Agg6 Agg5 Agg4 1.27mm 1.27mm Antipad diameter  30mil Drill diameter before plating  10mil

11 IBM Card IBM Card Materials Used: TU-883
Open Area wiring: 4.1mil line width – 4.4mil intra-pair separation – 12mil pair to pair separation Pin Area wiring: 3mil line width – 4mil intra-pair separation – 4mil pair to pair separation 30mil anti pad in LGA region

12 Connector Model Details - for both topologies (1) & (2) -

13 (From FCI sheet) Tested with: 4mm ESC OL IBM Confidential

14 Worst case pinout region
Victim Pair

15 Vendor Card Topology Details

16 Vendor Card Vias: Stack Up Used
Hybrid Stack up with Material R1755V: er=4.351 ; tand= (green core and prepreg) Meg6: er=3.6 ; tand=0.003 (blue core and prepreg) Note: the anticipated vendor card material is expected to be Meg4 like. However, it is anticipated that the vendor card will have a similar stack up build (in dimensions) to the Hybrid Meg6 stack up shown on the left. Via models were available for the stack up shown on the left and were used for the purpose of building the reference channel due to the minimal expected SI effect.

17 Module PCB Via Pinout Edge 1mm IBM Tx channel topology via: 1mm
1-2 5-6 7-8 9-10 11-12 3-4 IBM Tx channel topology via: Breakout layer : S08 IBM Rx channel topology via: Breakout layer : S03 20mil backdrilled stub 1mm via 13-14 19-20 21-22 23-24 15-16 17-18 29-30 27-28 31-32 33-34 35-36 25-26 Antipad  28mil circular antipad Signal via Drill diameter before plating  8mil

18 Megarray Conn PCB Via Pinout
Agg1 Agg8 Agg2 Agg3 Agg7 Agg6 Agg5 Agg4 IBM Tx channel topology via: Breakout layer : S08 20mil stub top drilling IBM Rx channel topology via: Breakout layer : S03 No top drilling 1.27mm 1.27mm Antipad  Signal via Drill diameter before plating  8mil 1.27mm 30mil on all layers: 15mil Shared anti

19 Capacitor Vias IBM Tx channel topology via: Breakout layer : S08
20mil stub top drilling IBM Rx channel topology via: Breakout layer : S03 No top drilling 22mil 20mil 1.27mm pitch 38mil Capacitor pad void (when used)= 22mil x 20mil (located directly under pad) Antipad  Signal via Drill diameter before plating  8mil Surface layer pad diameter (active side)  18 mil Signal layer pad diameter  20 mil Bottom layer pad diameter (stub side when not top/back-drilled)  21 mil 1.27mm 30mil on all layers: 15mil Shared anti 9mil

20 10nF Capacitor Used in topologies (1) & (2)

21 Vendor Card Vendor Card Materials Used: EM888 (Meg4 like material)
Open Area wiring: 4.7mil line width – 5.8mil intra-pair separation – 12mil pair to pair separation

22 Frequency Response Plots

23 IBM is Tx With Cap With Cap With No Cap Pad Void With Cap Pad Void
12.5GHz = 17.3dB 12.5GHz = 21.8dB 12.5GHz = 17.6dB 12.5GHz = 21.9dB With No Cap 12.5GHz = 16.5dB 12.5GHz = 21.6dB

24 IBM is Rx With Cap With Cap With No Cap Pad Void With Cap Pad Void
12.5GHz = 17.0dB 12.5GHz = 19.5dB 12.5GHz = 16.9dB 12.5GHz = 19.5dB With No Cap 12.5GHz = 16.6dB 12.5GHz = 19.6dB

25 Backup Frequency Response Plots

26 Topology (1) IBM is Tx: IBM Module Wiring

27 Topology (2) IBM is Rx: IBM Module Wiring


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