1. Status of front-end electronics for the OPERA Target Tracker
Ludovic RAUX
Oscillation Project with Emulsion-tRacking Apparatus
Status of front-end electronics for the OPERA Target Tracker
LAL Orsay
S.BONDIL, J. BOUCROT, J.E.CAMPAGNE, A.CAZES, C. de LA TAILLE, A. LUCOTTE, G. MARTIN-CHASSARD, L. RAUX, J.P. REPELLIN
BERN University
K.BORER, M.HESS
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

2. OPERA Collaboration Meeting - Gran Sasso
Contents
Version 2 chip prototype (Reminder)
Chip characteristics
Measurements (made in collaboration with Bern)
Version 3 chip prototype – OPERA-ROC (ReadOut Chip)
Conclusion and perspectives
Comparison: Version 2 vs version 3
Production schedule
Production cost
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

3. Version 2 prototype front-end chip
Ludovic RAUX
Version 2 prototype front-end chip
32 inputs (Ch1-Ch32), trigger output + 1 multiplexed charge output
Variable gain preamplifier : range 1-3, resolution = 4 bits (1, 0.5, 0.25, 0.125)
Fast shaper (tp = 20 ns, G ~ 20) for auto-trigger (1/3 pe)
Slow shaper (tp = 100 ns, G ~ 1) for charge measurement
On chip track & hold and output multiplexer
– Submitted in September 2002
– Received in March 2003
– Validated in April 2003
Technology: AMS 0.8 m BiCMOS
Chip area : 10 mm2
Package : QFP100
Power consumption : 250 mW
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

4. Version 2 chip Tests: summary
32-channel chip (version 2)
Preamplifier:
Gain correction
Input impedance
Operational (4 bits): Effective range [0-2.8]
1.5-2k Ohms
Auto-Trigger :
Fast Shaper tP
Fast Shaper Gain
Pedestal spread
Noise RMS
Comparator
tP = 20 ns
800mV/pC ( 130 mV/pe)
~ 0.1 pe
~ 1 mV ( ~ 0.01 pe)
Operational:  =100 % down to 1/4 pe
Charge measurement :
Slow Shaper tP
Slow Shaper Gain
Dynamic range
Cross-talk
tP = 100 ns
140 mV/pC ( 22 mV/pe)
[0-75] pe
~ 40 mV ( ~1.5 pe)
0.5 mV ( ~0.02 pe)
~ 1%
1 p.e. =
The version 2 chip performance suits the Target Tracker requirements
Validation procedure is reported in OPERA note 40
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

5. Version 3 chip (Reminder)
Version 3 chip – OPERA ROC(ReadOut Chip)
Significant improvements
Reduced cross-talk (decreased preamplifier input impedance)
Reduced pedestal spread in charge measurement and autotrigger
Main new features included: (tested in a previous test chip: « meccano chip »)
New preamplifier architecture with low input impedance and increased gain correction range (on 6 bits) : from 0 to ~ 4
New Fast Shaper structure (differential configuration amplifier) : low offset
New Slow Shaper structure (Sallen-Key structure and differential configuration amplifier): low offset
Improved Track & Hold based on Widlar structure
Register to identify the triggered channel
– Submitted in November 2002
– Received in March 2003
– Validated in May 2003
Technology: AMS BiCMOS 0.8 m
Chip area : 10 mm2
Package : QFP100
Power consumption : 185 mW
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

6. Version 3 chip test: Preamplifier
Preamplifier performance
Preamlifier Gain (G=1) :
95 mV/pC (15 mV/pe) (1 pe= )
Gain Correction :
Operational : 6 bits => 64 levels of corrections (2,1,1/2,1/4,1/8,1/16)
Effective range: from 0 to 3.5 (0 to ~ 4 expected)
Possibility to switch OFF/ON any individual channel
Noise :
< ns and 200 ns
Input Impedance :
Zin~110 Ohms (1.5k-2k Ohms in Version 2)
iin
iout
Slow shaper
0.01 pe
Fast shaper
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

7. Version 3 chip tests: Auto-trigger (I)
Fast Shaper :
Fast Shaper Gain:
~ 4.5V/pC (~800 mV/pe)
Fast Shaper Peaking time:
tP ~ 15 ns
Noise RMS:
~ 1 mV (~ 0.01 pe)
Comparator :
Efficiency:
 =100 % down to 1/10 pe (goal: 1/3)
Offset spread:
~  0.02 pe : 2 sources => Fast shaper (main contribution) and Comparator (negligible)
0.02pe
Fast Shaper Vout vs Qin
Vout (V)
0.12 p.e.
12 p.e.
1.2 p.e.
Gain 2:1
Time (ms)
Gain 3
Gain 1
0.02pe
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

8. Version 3 chip tests: Auto-trigger (II)
Comparator :
Time walk :
Δt~15 ns
15 ns
Hit Register :
Allows to Identify the triggered channel :
Operational
Crosstalk sensitive for Qinj>20pe
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

9. Version 3 chip tests: Charge measurement (I)
Slow Shaper Vout vs Qin
Time (s)
Measured Performance:
Dynamic Range:
Linearity: < 1% [0-20] pC  [0-125] pe
Slow shaper Gain (G=1):
~125 mV/pC (20 mV/pe)
Slow shaper peaking time:
tp~160 ns
Dynamic range [0-75] pe
Dynamic range [0-125] pe
Version 2
Version 3
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

10. Version 3 chip tests: Charge measurement (II)
Measured Performance:
Track & Hold:
Fully Operational : Widlar Structure: OK
Noise RMS :
~ 1.5 mV (0.07 pe)
Pedestal spread :
 6 mV ( ~ 0.3 pe) peak-to-peak (~ 1 mV expected)
Version 2
20 mV
Version 3
6 mV
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

11. Version 3 chip tests: Cross-talk
Channel-to-Channel cross-talk :
2 contributions :
Capacitive coupling between neighboring channels: less than 0.3% (low input impedance)
Systematic injection in all channels (comes from power supplies): less than 0.5%
Trigger-Charge cross-talk
Cross talk Trigger measurements
negligible
 1/100
sampling time
Neihgboring channels
Qinj=1/3 pe
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

12. Comparison :Version 2 vs Version 3
185 mW
250 mW
Consumption
QFP 100
Package
Range , 6-bit resolution :
0 + (2, 1, 1/2, 1/4, 1/8, 1/16)
Zin ~ 110 
3 pF alternate
Range , 4-bit resolution :
1 + (1, 1/2, 1/4, 1/8, 1/16)
Zin ~ 1.5 to 2 k 
None
Gain correction
Input impedance
Input for test pulse
tP=15 ns
4.5 V/pC (700 mV/pe)
~ 0.03 pe
~ 1 mV (~1/1000 pe)
Operational:  =100 % down to 1/10 pe
15 ns
Operational
tP=20 ns
800 mV/pC (130 mV/pe)
~ 0.1 pe
~ 1 mV ( ~0.01 pe)
Operational:  =100 % down to 1/4 pe
Fast Shaper tP
Fast Shaper Gain
Pedestal spread
Noise RMS
Comparator
Time walk
Hit register
OPERA-ROC (version 3 chip)
Version 2 chip
[0-12pC] ([0-75pe])
±20 mV (± 1 pe)
~ 0.5 mV (~0.02 pe)
tP=110 ns
140 mV/pC (22 mV/pe)
~1%
[0-20pC] ([0-125pe])
±6 mV (±0.3 pe)
~ 1.5 mV (~0.07 pe)
tP=160 ns
125 mV/pC (20 mV/pe)
<1%
Dynamic range
Slow Shaper tP
Slow Shaper Gain
Cross-talk
1 p.e. =
Preamplifier
Auto-trigger
Charge measurement
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

13. Conclusion: Version 2 vs Version 3
Both versions suit the Target Tracker requirements and are validated
Both versions can be used without any new iteration
But version 3 improves significantely version 2
The chip must to be tested with the Bern Front-end board Prototype
Proposal : OPERA ROC (Version 3) is considered as the baseline chip
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

14. OPERA Collaboration Meeting - Gran Sasso
Production schedule
Production could start in July 2003
Delivery expected in Orsay in October 2003
Test of the mass-produced chips will take place in Orsay in November 2003: Bench-test set-up has started
Chips available for the collaboration by January 2004
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

15. Production cost estimation
Both versions are cost equivalent (same area: ~10mm²)
Silicon : 2800 dies (assuming 80% yield and 200 spares) : 48 k Euros
Package : PQFP-100 : 7 k Euros
Total : 55 k Euros (~ 0.7 Euros per channel)
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso

16. Version 3 chip tests: Auto-trigger (I)
Fast Shaper :
Fast Shaper Gain:
~ 4.5V/pC (~800 mV/pe)
Fast Shaper Peaking time:
tP ~ 15 ns
Noise RMS:
~ 1 mV (~ 0.01 pe)
Comparator :
Efficiency:
 =100 % down to 1/10 pe (goal: 1/3)
Offset spread:
~ 0.05 pe : 2 sources => Fast shaper (main contribution) and Comparator (negligible)
Fast Shaper Vout vs Qin
Vout (V)
0.12 p.e.
12 p.e.
1.2 p.e.
Gain 2:1
Time (ms)
Tuesday, 20 May 2003
OPERA Collaboration Meeting - Gran Sasso