1.  The LPC2xxx devices currently have two on- chip UARTS.  Except UART1 has additional modem support.

2. UART UART Initialization: void init_serial (void) /* Initialize Serial Interface */ { PINSEL0 = 0x00050000; /* Enable RxD1 and TxD1 */ U1LCR = 0x00000083; /* 8 bits, no Parity, 1 Stop bit */ U1DLL = 0x000000C2; /* 9600 Baud Rate @ 30MHz VPB Clock */ U1LCR = 0x00000003; /* DLAB = 0 */ }

3. UART The Baud rate generator is a sixteen bit prescaler which divides down Pclk to generate the UART clock which must run at 16 times the Baud rate. Hence the formula used to calculate the UART Baud rate is: Divisor = Pclk/16 x BAUD

4. UART

5. TRANSMIT FIFO: int putchar (int ch) /* Write character to Serial Port */ { if (ch == '\n') { while (!(U1LSR & 0x20)); U1THR = CR; /* output CR */ } while (!(U1LSR & 0x20)); return (U1THR = ch); } RECIEVER FIFO: int getchar (void) /* Read character from Serial Port */ { while (!(U1LSR & 0x01)); return (U1RBR); }

6. I2C  Philips were the original inventors of the I2C bus standard  The I2C interface can operate in master or slave mode up to 400K bits per second  In master mode it will automatically arbitrate in a multi-master system

7. I2C

9. I2CCONSET  Control Registers I2CONCLR I2SCLH  Bit Rate I2SCLL

10. I2C  I2STAT  The status register returns control codes which relate to different events on the bus.  I2DAT  The data register is used to supply each byte to be transmitted, or as data is received it will be transferred to this register.  I2ADR  When the LPC2000 is configured as a slave device its network address is set by programming this register.

11. I2C I2C Initialization: VICVectCntl1 = 0x00000029; // select a priority slot for a given interrupt VICVectAddr1 = (unsigned)I2CISR // pass the address of the IRQ into the VIC slot VICIntEnable = 0x00000200; // enable interrupt PINSEL0 = 0x50; // Switch GPIO to I2C pins I2SCLH = 0x08; // Set bit rate to 57.6KHz I2SCLL = 0x08;

12. I2C Process:  The I2C peripheral must be programmed to respond to each event which occurs on the bus.  First thing we must do is to configure the VIC.  Next the pin-select block is configured to connect the I2C data and clock lines to the external pins.  Lastly we must set the bit rate by programming I2SCLH and I2SCLL.

13. I2C The formula for the I2C bit rate is given as: Bit Rate = Pclk/(I2SCLH+I2CSLL) For e.g. if Pclk = 14.7456 then Bit Rate = 14.7456/B ( 8 + 8) = 937500

14. I2C These registers are used to enable the I2C peripheral and interrupt as well as controlling the I2C bus start, stop and acknowledge conditions.

15. I2C  To enter the master mode the I2C peripheral must be enabled and the acknowledge bit must be set to zero.

16. I2C Transaction:  Signals a start condition  Clock line pulled high and data line low  Address of the slave written onto the bus followed by read/write.  Slave replies with an acknowledgement.  Then the data can be transmitted

17. I2C  ARM7 CPU has to micromanage the I2C bus for each transaction. Master Routine: void I2CTransferByte(unsigned Addr, unsigned Data) { I2CAddress = Addr; // Place address and data in Global to be used by the interrupt I2CData = Data; I2CONCLR = 0x000000FF; // Clear all I2C settings I2CONSET = 0x00000040; // Enable the I2C interface I2CONSET = 0x00000020; // Start condition }

18. SPI  Like the I2C interface the SPI interface is a simple peripheral  Not intelligent enough to manage the bus.

19. SPI

20. The SPI peripheral has four external pins:  Serial Clock  Slave Select  Master In Slave Out  Master Out Slave In

21. SPI  The serial clock pin provides a clock source of up to 400Kbits/sec when in master mode, or will accept an external clock source when in slave mode.  An external peripheral is selected by a slave select pin which is a separate pin.  When the SPI peripheral is in slave mode, it has its own slave select input which must be pulled low to allow an SPI master to communicate with it.  The two data transfer pins master in / slave out and master out / slave in are connected to the remote SPI device

22. SPI Programmer’s Interface for SPI peripheral has five Registers:  Clock Counter Register  Control Register  Data Register  Interrupt Flag  Status Register

23. SPI  The clock counter register determines the Baud rate.  The control register is used to configure the operation of the SPI bus (SPI Clock & Data Lines)  Configuration of clock means configuring Phase & Polarity  Finally the data orientation may also be defined as the most significant bit transferred first or the least significant bit transferred first.  Once the bit rate has been set and the control register configured, then communication can begin.