1. Samar Abdi (slides courtesy of A. Gerstlauer, D. Gajski and R. Doemer) Assistant Professor Electrical and Computer Engineering Concordia University http://www.ece.concordia.ca/~samar COEN 691B: Embedded System Design Lecture 1: Introduction, Course Logistics

2. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 2Intro to Real-Time Systems

3. COEN 691B: Embedded System Design3 Embedded Systems Systems that are part of a larger system – Application-specific Diverse application areas – Tight constraints Real-time, performance, power, size Cost, time-to-market, reliability Ubiquitous – Far bigger market than general- purpose computing (PCs, servers) $46 billion in ‘04, >$90 billion by 2010, 14% annual growth 4 billion devices in ‘04 98% of processors sold [Turley02, embedded.com]

4. COEN 691B: Embedded System Design4 System Design is hard…

5. COEN 691B: Embedded System Design5 … and getting harder Growing system complexities – Increasing application demands Networked and distributed Cyber-physical integration Increasingly programmable & customizable – Technological advances Multi-Processor System-On-Chip (MPSoC) 10,000 1,000 100 10 1 0.1 0.01 0.001 Logic transistors per chip (in millions) 100,000 10,000 1000 100 10 1 0.1 0.01 Productivity (K) Trans./Staff-Mo. 198119831985198719891991199319951997199920012003200520072009 IC capacity Productivity Gap Source: SEMATECH; Courtesy of: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

6. COEN 691B: Embedded System Design6 General-Purpose Computing Reaching physical limits of technology scaling – Power/utilization/… walls and dark silicon – Efficiency/optimality vs. flexibility/generality  Opportunity and need for specialization  Heterogeneous multi-core / Asynchronous CMP  GP-GPUs

7. COEN 691B: Embedded System Design7 Source: T. Noll, RWTH Aachen, via R. Leupers, “From ASIP to MPSoC”, Computer Engineering Colloquium, TU Delft, 2006 Processor Implementation Options

8. COEN 691B: Embedded System Design8 Multi-Processor System-on-Chip (MPSoC) Frontside Bus System Memory Local Bus Local RAM Bridge Shared RAM DSP Bus DSP RAM Memory Controller GPU DSP Hardware Accelerator CPU Hardware Accelerator Video Front End

9. COEN 691B: Embedded System Design9 MPSoC Challenges Applications Programming Model? Complexity – High degree of parallelism at various levels – High degree of design freedom – Multiple optimization objectives design constraints Heterogeneity – Of components Processors, memories, busses – Of design tasks Architecture, mapping, scheduling

10. COEN 691B: Embedded System Design10 System level Abstraction Levels Move to higher levels of abstraction [ITRS07, itrs.net]  Electronic system-level (ESL) design 1E0 1E1 1E2 1E3 1E4 1E5 1E6 1E7 Number of components Level Gate RTL Algorithm Transistor Abstraction Accuracy Source: R. Doemer, UC Irvine

11. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 11Intro to Real-Time Systems

12. Course Logistics Course website: on Moodle Lectures: Tue, 13:15 – 16:00 in H-415 Office hours: W 15:00 – 17:00, EV 5.159 All lectures slides will be made available on course website by next week Programmer on Duty: Aryan Yaghoubian – 4 hrs per week (split across 2 days), Time TBD 12COEN 691B: Embedded System Design

13. Grading Midterm Exam (50%) – Multiple-choice SystemC programming problems – Scheduled in class on April 7, 2015 (No samples!!) Programming assignments (100%) – Specification Model5% – Timed Unscheduled Model10% – Scheduled Model15% – HW-SW Partitioned Model10% – Communication Model10% 13COEN 691B: Embedded System Design

14. Programming Assignments Total five programming assignments – To be done independently – First assignment will be posted on Moodle by next class – Submissions must be done on Moodle SystemC modeling for embedded system specification – Digital camera example (JPEG encoder) – Original C model will be provided – SystemC models at different levels of abstraction will be built in different assignments – Knowledge of C++ and programming skills are essential for completing the assignments 14COEN 691B: Embedded System Design

15. Implementation Platform Implementation on Linux – All SystemC code must be designed to work on Linux – You can choose to edit and develop on Windows, but the code must be tested on Linux – You must have/obtain an ENCS account see http://www.encs.concordia.ca/helpdesk/access.htmlhttp://www.encs.concordia.ca/helpdesk/access.html SystemC library is installed on ENCS linux servers – You can connect via ssh to login.encs.concordia.ca – http://www.encs.concordia.ca/helpdesk/howto/xserve r.html http://www.encs.concordia.ca/helpdesk/howto/xserve r.html – Please talk to helpdesk or POD for all Linux issues 15COEN 691B: Embedded System Design

16. Submission and Grading You must submit your code as a tar archive on Moodle – Submission deadlines are very strict – Not submitting on time will automatically result in a 0 grade on the assignment (no negotiations) Testing and grading – 4 test cases will be provided with each assignment – Your code must pass all 4 cases to secure 50% on the assignment – An additional 4 tests will be conducted on your code – The additional tests must also pass for 100% credit 16COEN 691B: Embedded System Design

17. Plagiarism All Programming Assignments require original work – Strictly enforced – All plagiarism cases will be reported – Please refer to Concordia’s code of conduct: http://provost.concordia.ca/academicintegrity/code/ 17COEN 691B: Embedded System Design

18. 18 Textbooks Main textbook – D. Gajski, S. Abdi, A. Gerstlauer, G. Schirner, Embedded System Design: Modeling, Synthesis, Verification, Springer, 2009 (“orange book”) SystemC Reference – T. Groetker, S. Liao, G. Martin, S. Swan, System Design with SystemC, Kluwer, 2002 (“black book") Several online tutorials and examples available Additional reading material (papers) will be posted on the webpage as the course progresses

19. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 19Intro to Real-Time Systems

20. COEN 691B: Embedded System Design20 System-Level Design From specification – Functionality, behavior Application algorithms Constraints To implementation – Architecture Spatial and temporal order Components and connectivity Across hardware and software  Design automation at the system level – Modeling and simulation – Synthesis – Verification Proc Requirements, constraints Implementation (HW/SW synthesis) System Design

21. COEN 691B: Embedded System Design21 Modeling A model: – Abstraction of physical reality  Mathematical formula, drawing/blueprint, data Core of any design process – Specification Define (formally!) desired characteristics, “golden” reference – Exploration Validate design choices – Analysis and evaluation Static analysis Simulation/experiments  Predict before the system is built  Contract of what to build  Detect problems early (and cheaply) Simulator Model StimuliResults  Correctness of model?  Accuracy vs. simplicity

22. COEN 691B: Embedded System Design22 System Specification Capture requirements (what) – Functional Free of any implementation details (not how) – Non-functional Quality metrics Performance constraints Formal representation – Models of computation Objects and compositions Concurrency and time – Executable Analysis or simulation  Application development  Precise description of desired system behavior  Complete and unambiguous Natural language  Ambiguous  Incomplete

23. COEN 691B: Embedded System Design23 System Architecture  Application mapping  Allocation  Partitioning  Scheduling Processing elements (PEs) – Processors General-purpose, programmable Digital signal processors (DSPs) Application-specific instruction set processor (ASIP) Custom hardware processors Intellectual property (IP) – Memories Communication elements (CEs) – Transducers, bus bridges – I/O peripherals Busses – Communication media Parallel, master/slave protocols Serial and network media

24. COEN 691B: Embedded System Design24 System Implementation Hardware – Microarchitecture – Register-transfer level (RTL) Software binaries – Application object code – Real-time operating system (RTOS) – Hardware abstraction layer (HAL) Interfaces – Pins and wires – Arbiters, muxes, interrupt controllers (ICs), etc. – Bus protocol state machines  Specification for further manufacturing  Logic synthesis  Layout

25. COEN 691B: Embedded System Design25 System Synthesis Front-End System Synthesis Front-End Software / Hardware Synthesis Back-End Software / Hardware Synthesis Back-End TLM Instruction-Set Simulator (ISS) C-based RTL Software Object Code Hardware VHDL/Verilog Application specification Transaction-Level Models TLM TLM n Platform library System-Level Design Flow System-Level Design Languages (SLDLs) C/C++ code

26. COEN 691B: Embedded System Design26 Models vs. Languages Computation models describe system behavior – Conceptual notion, e.g., recipe, sequential program Languages capture models – Concrete form, e.g., English, C Variety of languages can capture one model – E.g., sequential program model  C,C++, Java One language can capture variety of models – E.g., C++ → sequential program model, object-oriented model, state machine model Certain languages better at capturing certain models Models Languages Recipe SpanishEnglishJapanese PoetryStorySequent. program C++CJava State machine Data- flow Recipes vs. EnglishSequential programs vs. C Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

27. COEN 691B: Embedded System Design27 Text vs. Graphics Models versus languages not to be confused with text versus graphics – Text and graphics are just two types of languages Text: letters, numbers Graphics: circles, arrows (plus some letters, numbers) Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002. … X = 1; if (N) Y = X + 1; … N? X =1 Y = X + 1

28. COEN 691B: Embedded System Design28 Simulation vs. Synthesis Ambiguous semantics of languages  Simulatable but not synthesizable or verifiable  Impossible to automatically discern implicit meaning  Need explicit set of constructs case X is when X1=>... when X2=> Finite state machine Controller 3.415 2.715 -- Look-up table Memory Source: D. Gajski, UC Irvine

29. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 29Intro to Real-Time Systems

30. COEN 691B: Embedded System Design30 Design Flow Design methodology – Sequence of design models – Flow of transformations between models Models – Well-defined, rigorous semantics – Systematic flow from specification to implementation Languages – Representation of models in machine-readable form

31. COEN 691B: Embedded System Design31 Evolution of Design Flows Source: D. Gajski, UC Irvine

32. COEN 691B: Embedded System Design32 Y-Chart Models of Computation (MoCs) Models of Structure (MoSs) Source: D. Gajski, UC Irvine

33. COEN 691B: Embedded System Design33 Processor Synthesis Software processor Compilation and linking Hardware processor High-level synthesis Source: D. Gajski, UC Irvine

34. COEN 691B: Embedded System Design34 System Synthesis Structure Partitioning, mapping Timing Scheduling Source: D. Gajski, UC Irvine

35. COEN 691B: Embedded System Design35 Bottom-Up Methodology Each level generates library for the next higher level – Circuit: Standard cells for logic level – Logic: RTL components for processor level – Processor: Processing and communication components for system level – System: System platforms for different applications Floorplanning and layout on each level Source: D. Gajski, UC Irvine

36. COEN 691B: Embedded System Design36 Top-down Methodology Functional description is converted into component netlist on each level Each component function is decomposed further on the next abstraction level Layout is given only for transistor components Source: D. Gajski, UC Irvine

37. COEN 691B: Embedded System Design37 Meet-in-the-Middle Methodology Gate netlist is hand-off Three levels of synthesis – System is synthesized with processor components – Processor components are synthesized with RTL library – RTL components are synthesized with standard cells Two levels of layout – System layout is performed with standard cells – Standard cells layout with transistors Source: D. Gajski, UC Irvine

38. COEN 691B: Embedded System Design38 Platform-Based Design Meet-in-the-middle at the system level – System platform with standard components – System design reduced to mapping of specification onto pre-defined platform Source: D. Gajski, UC Irvine

39. COEN 691B: Embedded System Design39 System Modeling  Basis of any design flow and design automation  Inputs and outputs of design steps  Capability to capture complex systems  Precise, complete and unambiguous  Models at varying levels of abstraction  Level and granularity of implementation detail  Speed vs. accuracy Design models as an abstraction of a design instance – Representation of some aspect of reality Virtual prototyping for validation through simulation or formal analysis – Specification for further implementation/synthesis Describe desired functionality  Documentation & specification  Abstraction to hide details that are not relevant or not yet known  Different parts of the model or different use cases for the same model

40. COEN 691B: Embedded System Design40 Abstraction Levels Temporal orderLow abstraction High abstraction Implementation Detail Spatial order physical layout unstructured Structure real time untimed Timing

41. COEN 691B: Embedded System Design41 Top-Down Design Flow Implementation Architecture Specification Logic Design Product planning Structure pure functional bus functional RTL / ISA gates requirements Timing untimed timing accurate cycle accurate gate delays constraints System Design Processor Design

42. COEN 691B: Embedded System Design42 Top-Down Design Flow Implementation model Transaction-level model Specification model Logic design Product planning pure functional partitioned bus functional RTL / IS requirements untimed scheduled timing accurate cycle accurate constraints Timed model Processor design Communication design Computation design Structure Timing

43. COEN 691B: Embedded System Design43 Top-Down Design Flow untimed estimated timing timing accurate cycle accurate constraints pure functional transaction level bus functional RTL / IS requirements Specification model Algor. IP Proto. IP Timed model Communication refinement Comp. IP Implementation model Software synthesis Interface synthesis Hardware synthesis RTOS IP RTL IP Computation refinement Capture Transaction-level model Product planning Logic design Structure Timing

44. COEN 691B: Embedded System Design44 Design Methodology System designValidation flow Specification model Algor. IP Proto. IP Timed model Communication refinement Transaction-level model Comp. IP Estimation Validation Analysis Compilation Simulation model Estimation Validation Analysis Compilation Simulation model Estimation Validation Analysis Compilation Simulation model Implementation model Software synthesis Interface synthesis Hardware synthesis Backend Estimation Validation Analysis Compilation Simulation model RTOS IP RTL IP Computation refinement Capture

45. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 45Intro to Real-Time Systems

46. COEN 691B: Embedded System Design46 Languages  Represent a model in machine-readable form  Apply algorithms and tools Syntax defines grammar – Possible strings over an alphabet – Textual or graphical Semantics defines meaning – Mapping onto an abstract state machine model Operational semantics – Mapping into a mathematical domain (e.g. functions) Denotational semantics  Semantic model vs. design models  Basic semantic models can represent many design models  Discrete event model for hardware and system simulation  Design models can be represented in different languages

47. COEN 691B: Embedded System Design47 Evolution of Design Languages Netlists – Structure only: components and connectivity  Gate-level [EDIF], system-level [SPIRIT/XML] Hardware description languages (HDLs) – Event-driven behavior: signals/wires, clocks – Register-transfer level (RTL): boolean logic  Discrete event [VHDL, Verilog] System-level design languages (SLDLs) – Software behavior: sequential functionality/programs  C-based, event-driven [SpecC, SystemC, SystemVerilog]

48. COEN 691B: Embedded System Design48 System-Level Design Languages (SLDLs) Goals – Executability Validation through simulation – Synthesizability Implementation in HW and/or SW Support for IP reuse – Modularity Hierarchical composition Separation of concepts – Completeness Support for all concepts found in embedded systems – Orthogonality Orthogonal constructs for orthogonal concepts Minimality – Simplicity Source: R. Doemer, UC Irvine

49. COEN 691B: Embedded System Design49 System-Level Design Languages (SLDLs) Requirements Source: R. Doemer, UC Irvine

50. COEN 691B: Embedded System Design50 System-Level Design Languages (SLDLs) C/C++ – ANSI standard programming languages, software design – Traditionally used for system design because of practicality, availability SystemC – C++ API and class library – Initially developed at UC Irvine, standard by Open SystemC Initiative (OSCI) SpecC – C extension – Developed at UC Irvine, standard by SpecC Technology Open Consortium (STOC) SystemVerilog – Verilog with C extensions for testbench development Matlab/Simulink – Specification and simulation in engineering, algorithm design Unified Modeling Language (UML) – Software specification, graphical, extensible (meta-modeling) – Modeling and Analysis of Real-time and Embedded systems (MARTE) profile IP-XACT – XML schema for IP component documentation, standard by SPIRIT consortium Rosetta (formerly SLDL) – Formal specification of constraints, requirements SDL – Telecommunication area, standard by ITU … Source: R. Doemer, UC Irvine

51. COEN 691B: Embedded System Design51 Separation of Concerns Fundamental principle in modeling of systems Clear separation of concerns – Address separate issues independently System-Level Description Language (SLDL) – Orthogonal concepts – Orthogonal constructs System-level Modeling – Computation encapsulated in modules / behaviors – Communication encapsulated in channels Source: R. Doemer, UC Irvine

52. COEN 691B: Embedded System Design52 Computation vs. Communication Traditional model – Processes and signals – Mixture of computation and communication – Automatic replacement impossible s2 s1 s3 P1P2 Source: R. Doemer, UC Irvine Channel concept (OOP) Tasks and channels Separation of computation and communication Plug-and-play B2 v2 v1 v3 B1 C1

53. COEN 691B: Embedded System Design53 Computation vs. Communication Protocol Inlining – Specification model – Exploration model Computation in behaviors Communication in channels B2 v2 v1 v3 B1 C1 Source: R. Doemer, UC Irvine Implementation model – Channel disappears – Communication inlined – Wires exposed B2B1 v2 v1 v3

54. COEN 691B: Embedded System Design54 IP protocol channel in wrapper C2 Intellectual Property (IP) Communication IP: Channel with wrapper replacable at any time Virtual channel v2 v1 v3 C1 IP Source: R. Doemer, UC Irvine Protocol inlining with hierarchical channel B1B2 v2 v1 before v2 v1 B1B2 after

55. Lecture Outline What are Embedded Systems and why should we care? Course organization/policies ES modeling ES design methodologies Languages Case study for the programming assignments 55Intro to Real-Time Systems

56. COEN 691B: Embedded System Design56 Programming Assignment: Digital Camera Specification Jpeg Encoder CCD Control File I/O SoC pixelbytes Flash Memory CCD Sensor JpegEncoder ReadDCTQuantHuff 8x8 block Pixelbytes

57. COEN 691B: Embedded System Design57 Charge-Coupled Device (CCD) Special sensor that captures an image Light-sensitive silicon solid-state device composed of many cells Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

58. COEN 691B: Embedded System Design58 Compression JPEG (Joint Photographic Experts Group) – Popular standard format for representing digital images in a compressed form – Provides for a number of different modes of operation – Mode used in this chapter provides high compression ratios using DCT (discrete cosine transform) – Image data divided into blocks of 8 x 8 pixels – 3 steps performed on each block DCT Quantization Huffman encoding Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

59. COEN 691B: Embedded System Design59 Discrete Cosine Transform (DCT) Transforms original 8 x 8 block into a cosine- frequency domain – Upper-left corner values represent low frequency components Essence of image – Lower-right corner values represent finer details Can reduce precision of these values and retain reasonable image quality FDCT (Forward DCT) formula – C(h) = if (h == 0) then 1/sqrt(2) else 1.0 Auxiliary function used in main function F(u,v) – F(u,v) = ¼ × C(u) × C(v) Σx=0..7 Σy=0..7 Dxy × cos(π(2u + 1)u/16) × cos(π(2y + 1)v/16) Gives encoded pixel at row u, column v Dxy is original pixel value at row x, column y Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

60. COEN 691B: Embedded System Design60 Quantization Achieve high compression ratio by reducing image quality – Reduce bit precision of encoded data Fewer bits needed for encoding One way is to divide all values by a factor of 2 – Simple right shifts can do this – Dequantization would reverse process for decompression After DCTAfter quantization Divide each cell’s value by 8 Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

61. COEN 691B: Embedded System Design61 Serialize 8 x 8 block of pixels – Values are converted into single list using zigzag pattern Perform Huffman encoding – More frequently occurring pixels assigned short binary code – Longer binary codes left for less frequently occurring pixels Each pixel in serial list converted to Huffman encoded values – Much shorter list, thus compression Huffman Encoding (ZigZag) Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

62. COEN 691B: Embedded System Design62 Huffman Encoding (2) Pixel frequencies on left – Pixel value –1 occurs 15 times – Pixel value 14 occurs 1 time Build Huffman tree from bottom up – Create one leaf node for each pixel value and assign frequency as node’s value – Create an internal node by joining any two nodes whose sum is a minimal value This sum is internal nodes value – Repeat until complete binary tree Traverse tree from root to leaf to obtain binary code for leaf’s pixel value – Append 0 for left traversal, 1 for right traversal Huffman encoding is reversible – No code is a prefix of another code 144 5 3 2 1 0 -2 -10 -5 -3 -4 -8 -9 6 14 1 1 2 1 1 2 1 2 2 4 3 5 4 6 5 9 5 1010 5 1 5 1414 6 1717 8 1818 1515 29 3535 6464 1 Pixel frequency Huffman tree Huffman codes Source: T. Givargis, F. Vahid. “Embedded System Design”, Wiley 2002.

63. Programming Assignments 1.C model to a concurrent SystemC Process Network model 2.Timing measurement for individual tasks and creation of a timed model 3.Modeling the RTOS scheduling layer to determine performance of SW implementation 4.Modeling a HW-SW solution by moving tasks to faster HW module(s) 5.Refining the HW-SW communication by adding a bus models 63COEN 691B: Embedded System Design

64. What will you learn? How to model embedded systems? – Models of computations: process and state-based – System-level modeling language (SystemC) – Concurrency, Timing, Scheduling, Communication How to predict performance of embedded systems? – source-level timing analysis How to do hardware-software co-design? – Partitioning and mapping of applications – Synthesis of platforms How to ensure correctness of embedded systems? – simulation techniques 64COEN 691B: Embedded System Design

65. Summary Embedded systems are pervasive, difficult to design, and have a huge market! – Over $90 billion market for embedded processors – Embedded SW deployed in billions of electronic products – Embedded SW has become the major cost component in modern cars A model-based approach from specification to implementation is essential for success! 65COEN 691B: Embedded System Design