1. Surface Micromachining
Chang Liu
Micro Actuators, Sensors, Systems Group
University of Illinois at Urbana-Champaign
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UIUC

2. Outline Basic surface micromachining process
Most common surface micromachining materials - polysilicon and silicon oxide
LPCVD deposition of polysilicon, silicon nitride, and oxide
plasma etching for patterning structural layer
micromachined hinges - fabrication process and assembly technique
micromachined dimples and scratch drive actuators
Other sacrificial processing systems
metal sacrificial layer, plastics materials, etc.
Stiction and anti-stiction solutions
Multi User MEMS Process (MUMPS)
process definition and layer naming conventions
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3. Basic Sacrificial Layer Processing
Step 1: Deposition of sacrificial layer
Step 2: patterning of the sacrificial layer
Step 3: deposit structural layer (conformal deposition)
Step 4: liquid phase removal of sacrificial layer
Step 5: removal of liquid - drying.
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4. Process and Chemical Compatibility
For a two layer process
The deposition of the structural layer must not damage the sacrificial layer
Thermal stability
The pattering of the structural layer must not damage the sacrificial layer
Chemical and thermal stability
The removal of the sacrificial layer must not damage the structural layer
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5. Surface Micromachined Inductor
Air bridge can be formed using sacrificial etching.
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6. Micro Gears with Free-standing Chains
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7. Inductor - By Lucent Technologies
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8. Surface Micromachined, Out of Plane Structures
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9. Hinges
Used in micro optics component assembly.
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10. Hinge Fabrication Step 1: deposition of sacrificial layer.
Step 2: deposition of structural layer.
Step 3: deposition of second sacrificial layer.
Step 4: etching anchor to the substrate.
Step 5: deposition of second structural layer.
Step 6: patterning of second structural layer
Step 7: Etch away all sacrificial layer to release the first structural layer.
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11. For a four layer process …
Sacrificial layers (Sac1, sac2)
Structural layers (str 1, str 2)
Str1 deposition must not affect sac1
Str1 patterning must not affect sac1
Sac2 deposition must not affect sac1
Sac2 deposition must not affect str1
Sac2 patterning must not affect str1
Sac2 patterning must not affect sac1 (if sac 1 is exposed)
Str 2 deposition must not affect sac2
Str 2 deposition must no affect str1
Str 2 deposition must not affect sac1
Str 2 patterning must not affect sac2, str1, sac1
Sac 1 removal must not affect str 2, str1
Sac 2 removal must not affect str 2, str1
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12. To make things more complex and challenging
Certain layers need to be made of a certain material;
Stress control issues may dictate certain layer materials;
Electrical performances may dictate certain layer materials;
Economic issues may dictate certain layer materials;
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14. This is helpful but … Every lab is different.
Every machine is different.
Every run may be different.
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15. Metal Sacrificial Layers
PR 4620 (10m each)
Permalloy (>20m)
Aluminum (0.3m)
copper (9m each)
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16. Out Of Plane Devices
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17. Three Pillars of MEMS Goals: Better performance Better yield
Unique advantages
Lower cost
Higher yield …
Design
(physics,
Principle)
Materials
Fabrication
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18. Hybrid Fabrication Process
Combine the following processing styles into a single fabrication sequence
Bulk machining
Surface machining
Three dimensional assembly
Wafer bonding (low temperature or high temperature)
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19. Example: Scanning Probe Microscopy
Problems with existing processes
Etching of positive pyramids
Difficult tot control etch stop point; uniformity difficult to obtain
Utilizes silicon substrate
Can be replaced by lower costs substrates
Bulk etching
Long etching time involved to etch through the wafer
Anisotropic etching: 1-2 micrometere/min
DRIE: 1 micrometere/min, high costs of equipment and consumables
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20. A hybrid method to fabricate SPM probes
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26. Example: Solenoid One way of realizing surface micromachined solenoid
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27. A New Method
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30. LPCVD Process Temperature range 500-800 degrees
Pressure range mtorr (1 torr = 1/760 ATM)
Gas mixture: typically 2-3 gas mixture
Particle free environment to prevent defects on surface (pin holes)
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31. A Laboratory LPCVD Machine
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32. LPCVD Recipes for Silicon Nitride, Polysilicon, and Oxide
Polycrystalline silicon
Polysilicon is deposited at around oC and can withstand more than 1000 oC temperature. The deposition is conducted by decomposing silane (SiH4) under high temperature and vacuum (SiH4> Si+2H2).
Polysilicon is used extensively in IC - transistor gate
Silicon nitride
Silicon nitride is nonconducting and has tensile intrinsic stress on top of silicon substrates. It is deposited at around 800 oC by reacting silane (SiH4) or dichlorosilane (SiCl2H2) with ammonia (NH3) - SiH4+NH3 -> SixNy+ H.
Silicon oxide
The PSG is knows to reflow under high temperature (e.g. above 900 oC); it is deposited under relatively low temperature, e.g. 500 oC by reacting silane with oxygen (SiH4+O2-> SiO2+2H2). PSG can be deposited on top of Al metallization.
Silicon oxide is used for sealing IC circuits after processing.
The etch rate of HF on oxide is a function of doping concentration.
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33. Other Structural or Sacrificial Materials
Structural layers
evaporated and sputtered metals such as Gold, Copper
electroplated metal (such as NiFe)
plastic material (CVD plastic)
silicon (such as epitaxy silicon or top silicon in SOI wafer)
Sacrificial layers
photoresist, polyimide, and other organic materials
copper
copper can be electroplated or evaporated, and is relatively inexpensive.
Oxide by plasma enhanced chemical vapor deposition (PECVD)
PECVD is done at lower temperature, with lower quality. It is generally undoped.
Thermally grown oxide
relatively low etch rate in HF.
Silicon or polysilicon
removed by gas phase silicon etching
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34. A PECVD Machine Reaction chamber Processing gases RF plasma generator
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35. Electroplating
Electroplating process description
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36. Gas Phase Silicon Etching
XeF2
liquid phase under room temperature
2XeF2+Si => 2 Xe + SiF4
vapor phase under low pressure
etches silicon with high speed
BrF3
solid phase under regular pressure and room temperature
vapor phase (sublimation) under low pressure
BrF3 when reacted with water turns into HF at room temperature.
Both are isotropic etchants
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37. Organic Sacrificial Layer
Photoresist
etching by plasma etching (limited lateral etch extent)
or by organic solvents (acetone or alcohol)
Polyimide
etching by organic solvents
Advantage
extremely low temperature process
easy to find structural solutions with good selectivity
Disadvantage
many structural layers such as LPCVD are not compatible. Structure material must be deposited under low temperatures.
Metal evaporation is also associated with high temperature metal particles, so it is not completely compatible and caution must be used.
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38. Criteria for Selecting Materials and Etching Solutions
Selectivity
etch rate on structural layer/etch rate on sacrificial layer must be high.
Etch rate
rapid etching rate on sacrificial layer to reduce etching time
Deposition temperature
in certain applications, it is required that the overall processing temperature be low (e.g. integration with CMOS, integration with biological materials)
Intrinsic stress of structural layer
to remain flat after release, the structural layer must have low stress
Surface smoothness
important for optical applications
Long term stability
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39. Stiction = Sticking and Friction
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40. Origin of Stiction
As the liquid solution gradually vaporizes, the trapped liquid exert surface tension force on the microstructure, pulling the device down.
Surfaces can form permanent bond by molecule forces when they are close.
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41. Antistiction Method I - Active Actuation Method
Use magnetic actuation to pull structures away form the surface
reduced surface tension length of arm
Limitations
only works for structures with magnetic material.
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42. Antistiction Method II - Organic Pillar
Use organic pillar to support the structure during the liquid removal.
The organic pillar is removed by oxygen plasma etching.
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43. Antistiction Drying Method III - Phase Change Release Method Supercritical CO2 Drying
Avoid surface tension by relaying on phase change with less surface tension than water-vapor.
* p
Supercritical state: temp > 31.1 oC and pressure > 72.8 atm.
Step 1: change water with methanol
Step 2: change methanol with liquid carbon dioxide (room temperature and 1200 psi)
Step 3: content heated to 35 oC and the carbon dioxide is vented.
Free-standing cantilever beams upto 850 mm can stay released.
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44. Super Critical Drying
When a substance in the liquid phase at a pressure greater than the critical pressure is heated, it undergoes a transition from a liquid to a supercritical fluid at the critical temperature.
This transition does not involve interfaces.
Criteria
chemically inert, non-toxic
low critical temperature
CO2
critical temperature 31.1 oC
critical pressure 72.8 atm.(or 1073 psi)
Exchange methanol with liquid CO2 at 25oC and 1200 psi
closeoff vessel and heated to 35 oC, no interface is formed.
Vent vessel at a constant temperature above critical temperature.
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45. Antistiction Method III - Self-assembled Monolayer
Forming low stiction, chemically stable surface coating using self-assembly monolayer (SAM)
SAM file is comprised of close packed array of alkyl chains which spontaneously form on oxidized silicon surface, and can remain stable after 18 months in air.
OTS: octadecyltrichlorosilane (forming C18H37SiCl3)
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46. Result of SAM Assembly Surface oxidation: H2O2 soak SAM formation
isopropanol alcohol rinse
CCl4 rinse
OTS solution
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47. Structural-Sacrificial Compatibility
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51. Foundry Process Why: How:
Reduce the cost of development by providing standard and unusual processes at reasonable cost.
How:
Wafer sharing: many processes are performed on one wafer with many users sharing the mask.
Drawback: limited process materials and steps
Machine sharing: a user’s wafer is dedicated and ships back-and-forth among several vendors.
Drawback: long development and transport time
Dedicated foundry: a user’s wafer is handled at one site by dedicated personnel.
Drawback: highest cost among all forms of foundry process.
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52. The Importance of Design Rules
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53. Example: MUMPS Process Multi User MEMS Process
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54. The Versatility of MUMPS
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55. Compatibility Table Polysilicon Silicon oxide Photoresist (cured)
Metal
Dry plasma etching
Yes
Yes, slower speed
Yes, slow
No. Sputtering is possible
HF wet etching No
No, avoid long soak
No, avoid long contact
Uncured
photoresist
Photoresist developer
Organic rinse
Baking
Metal etchant
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56. Case 4.1, Electrostatic Actuators
Curved beam due to intrinsic stress in the cantilever.
Helps:
Release
Hinders:
Capacitance calculation
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57. How good is the design and process?
Advantage:
Direct integration of mechanical cantilever with FET transistors
Low noise sensor
Materials
Relatively difficult material
Exotic wafer
Processes
Difficulties:
Cantilever release using web silicon etchant may be a problem
Requires foundry process and new process development if industrialized
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58. Case 4.2: Torsional Capacitive Accelerometer
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59. How good is this design? Design: Material: Fabrication process Simple
No electronics integration
Greater noise
Material:
Readily available
Fabrication process
Does not require exotic materials or processes
Sacrificial release may be a problem, like the previous case
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60. Case 4.3: Membrane Parallel Plate Pressure Sensor
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61. Evaluation Design: Materials: Fabrication:
Results in hermetically sealed structures
Result in large gap distance to reduce damping
Materials:
Silicon materials
Doped silicon
Fabrication:
Length steps
Delicate bonding and handling
Process development is lengthy
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