1. TDAQ Working group meeting Mainz – 8/9/2011 Where do we stand? Where do we go?

2. 2 meetings at the price of 1

3. Sub-detectors TDAQ ReadoutTrigger L0L1L2 GTKStandalone ●●-- RICHTEL62/TDCB ●●Single-TEL62 2012 ●● Multi-TEL62(GPU?) 2013 ● GPU? ● LAVTEL62/TDCB ●●Single-TEL62 2012 ● Multi-TEL62 2013 ● ? LKr/L0--TEL62/Custom 2012 ●?-- LKrCustom(CREAM) ●-- CHANTITEL62/TDCB ●●--? CHODTEL62/TDCB ●●Single-TEL62/GPU? 2012 ●? CEDARTEL62/TRCB ●●-- STRAWSCustom (?) ●--2013 ● IRC/SACTEL62/? TEL62/TDCB? ●● --? MUVTEL62/TDCB ●●Single-TEL62 2012 ●HAC? Straws to decide on custom readout in Jan 2012. IRC/SAC to be defined.

4. TDCB - I Status report by B. Angelucci Pre-production done (total 14 boards exist) Now: basic tests in Pisa Ready for distribution in ~1 week (cables too) Firmware: basic features working, improvements needed. Complete rewrite and simulation would be advisable if manpower were available.

5. TDCB - II Sub-detector groups should arrange testing (with TELL1s): RICH: validation in Perugia (M. Piccini) LAV: validation in Frascati (M. Raggi) CEDAR: validation in Birmingham (A. Romano) STRAWS (fallback): validation in CERN (A. Sergi) MUV: ? CHANTI: ? SAC/IRC (if used?): ? Expect validation from sub-detectors (sustainable rate, time resolution, noise, etc.) After tests and validation from the sub-detectors: ready for full production. Default: full production in 2013. No more boards to be produced before final production unless decided otherwise (earlier full production is an option) Test setup for large number of boards to be built in Pisa

6. TELL1s TELL1s (either bought or on loan) are now available in: Pisa Perugia Roma Tor Vergata Birmingham CERN Mainz Napoli LNF One still available to loan Lab setup and TDCB tests possible with TELL1s

7. TEL62 Status report by E. Pedreschi One more prototype PCB can be mounted on short notice IF somebody is willing to get it and make significant tests before the end of the year Produce 10 boards at the end of 2011, to be used in the Dry/Test runs Default: full production in 2013 (Pisa+Roma TV). No more boards to be produced before final production unless decided otherwise Test procedure: in house/at firm ? Roma TV will produce test vectors Complete procurement of all components by early 2012 Recall: fallback solution for straws not included in component procurement

8. TEL62 firmware New framework for TEL62 started. Prioritization of tasks to have basic functionality ready for next year’s runs Manpower issues still present Involvement of 1 person per sub-detector needed: RICH: C. Santoni (Perugia) LAV: M. Raggi (Frascati) CEDAR: M. Krivda (Birmingham) LKr: G. Lamanna (CERN) LKr/L0: A. Salamon (Roma TV) CHANTI: ? MUV: M. Hita-Hochgesand (Mainz) SAC/IRC: ? Dedicated TEL62 firmware working meeting later today.

9. Autumn sale 1 TEL62: 3500 € 1 TDCB: 1000 € Set of 4 Cables: 500 € Lower prices expected for final production We ship worldwide with very good rates Boards come with working base firmware and nice color manual in electronic format Instruction courses available on subscription Hotline assistance available Pay with TID to NA62 account T145400 routing the document to me for information

10. Your cart TEL62TDCB+CablesBalance (k€) TotalOf which: spares Of which: in 2011 TotalOf which: spares Of which: in 2011 2011Who RICH62120426.5Pisa LAV1533507213.5Pisa LKr/L046820007Roma2 CHANTI1004010 CHOD1002100 CEDAR40118226.5Birm. STRAWS3110003.5CERN IRC/SAC2104211.5Sofia LKr2110003.5CERN MUV21240210Mainz 811110210 All cables are 6m long, except LAV which are 1.5m long

11. Dry run / test run ~1 month in June-July 2012 Not yet defined what we want/need in terms of readout/trigger This means: from TDAQ point of view test run = dry run (MY) GOLDEN RULE Whatever (TDAQ electronics) is going to be used in the September test run it must be installed and proven to work in the global infrastructure during the dry run

12. Dry run / test run: minimal goals - O(100) channels/sub-detector readout in coherent events - Full LKr readout - Conventional CHOD L0 trigger distributed via TTC - Full control of start/end spill (triggers) and special triggers - Parasitic L0 trigger primitives in data - TEL62/TDCB: complete readout, no inter-board communication - Data readout to PCs with no software trigger(s) but rough event building - Indipendent sub-detector initialization “by hand” Baseline plan (equipment, goals, priorities) to be drafted by next meeting. Need to start dedicated planning meetings

13. Crates Two (slightly) different versions of Wiener crates, both compatible with TEL62 (7700 €) One prototype of each available in NA62: Roma Tor Vergata and Frascati Test with TEL62 in 1 month (fake power-consuming firmware required) Assessment with FE electronics? Ordering and schedule? Full software support from CERN expected

14. Clock – Sub-detector stuff [Update from M. Krivda] LTU (NA62 version of ALICE board, Birmingham): paid for, ready, available, firmware being developed TTCex (new version, CERN): paid for, built, PLL problem found with new version, solution under investigation, no time estimate

15. Clock – Common stuff Master clock generator: NA48 one available (no spare) Fibres Layout finalized, document being finalized, to be bought (common fund), expect installation at beginning of 2012 Splitters Number defined, collecting offers for common order TTCit monitor board: production starting in September

16. L0TP - I Current baseline solution: implementation on a PC with a single existing PCIe card (Altera Stratix IV development board by Terasic) with additional NA62-specific daughter cards. To be proven working ! Stratix IV GX PCIe 8x 4 GbE on-board DDR on-board Clock inputs 2 connectors for daughter cards One board bought by Pisa, now being tested in Torino.

17. L0TP- II Torino group (E. Menichetti) joined the effort Current status/plan: - Ferrara to provide the board firmware - Torino to provide additional daughter cards - L0 trigger-matching code (on PC) not yet covered (1) Is this solution viable in terms of L0 latency? (2) L0TP for 2012 run(s): (a) prototype version of PC-based L0TP OR (b) “patched” temporary solution (e.g. Talk board) Assessment of (2) (and (1)?) by fall 2011

18. Higher-level triggers (1) Proposal @ Computing WG [J. Kunze]: merge all PC farms into a single one to be used both for L1 and L2 (incl. LKr) - L1 during the spill - L2 during the inter-spill (not starting until then) (all event data in memory during the spill) Looks reasonable (no latency issues) more flexible and possibly less expensive Assessment? What about 2012? (2) No L1 recipe so far to reach 100 kHz Downscaled/control triggers might (= will) easily saturate ANY trigger bandwidth in NA62: bandwidth allocation proposal needed (also true for L0)

19. Critical/urgent issues 1.L0TP: demonstrate we have a viable solution 2.Online software: start, responsibility? 3.TEL62 firmware: have basics ready for 2012 4.TELL1 radiation tests: (Birmingham) 5.Crates: validate, buy and get 6.Simulation: L0 for LKr, L1 and L2 7.Data transfer layer SW: common, avoid independent developments 8.Central repository: for documentation, firmware, software 9.Finalize specifications: e.g. fine time (sub 25-ns) information with each L0 trigger? [GTK, straws]