1. BYU CS/ECEn 124Lab 2 - FSM Lab1 Lab 2 – Finite State Machine Using the Digital State Machine Simulator, create five different machine configuration files that, with each successive clock cycle: 1.Toggles both LEDs. (Turn both on then both off – 2-state machine.) 2.Counts from 0 to 3 (binary) in the LEDs (4-state machine). 3.Alternates turning one LED on and off followed by the second LED turning on and off (4-state machine). 4.Turns one LED on followed by the other and then turns the first LED off followed by the other (4-state machine). 5.Flashes both LEDs on for one clock cycle then turns both off for the next two clock cycles (3-state machine). Use the 2-in/4-out PAL and at least one master/slave flip-flop in each machine implementation. Show the truth table used to implement each of your machines. The LEDs are derived using combinational logic from the current state. Clicking the 'Clock' button should step to the next state. Use the 'Run' button to continuously clock your machine.

2. BYU CS/ECEn 124Lab 2 - FSM Lab2 Digital State Machine Simulator Current State Output (LEDs) Next State FSM

3. BYU CS/ECEn 124Lab 2 - FSM Lab3 Simple FSM Example Combinational Logic Sequential Logic FSM Example 1 CurrentNextOutput ABKK 000OFF 011ON 100OFF 110

4. BYU CS/ECEn 124Lab 2 - FSM Lab4 Finite State Machine Cycle123456… LED1OFF ON Repeat… LED0ONOFF CurrentNextOutput ABLKNM 0001OFFON 0110OFF 1011 1100ONOFF A  B ¬B¬B (¬A  B) + (A  ¬B) ¬A  ¬B FSM Example 2