1. 8086 – I/O Interfacing - I/O mapped I/O
- Input and Output instructions
- PPI 8255
– 8255 interfacing
- Interfacing 7 segment LED in serial mode.
- Interfacing keyboard
- Programmable interval timer 8254
– 8254 interfacing.
- Examples
- Serials communication
programmable communication interface.
8086 – interface
- Examples

2. 8086 I/O Interfacing
8086 – I/O mapped I/O architecture
-I/O is treated as I/O
-Memory in treated as memory
-I/O devices identified by I/O ports
-Separate signals for I/O read-write than memory read-write
Minimum mode M/IO = 0 , RD = 0 I/O READ
M/IO = 0 , WR = 0 I/O WRITE
Maximum mode IORC - I/O READ
IOWC I/O WRITE
AIOWC
– Separate instruction for I/O Read - Write

3. I/O Read (AL) (P8) (AX) (P8) (AL) (P. DX) (AX) (P. DX) I/O Write
IN AL, P8
(AL) (P8)
IN AX, P8
(AX) (P8)
IN AL, DX
(AL) (P. DX)
IN AX, DX
(AX) (P. DX)
I/O Write
OUT P8, AL, 8 bit sent to P8
OUT P8, AX, 16 bit sent to P8
OUT DX, AL
(P. DX) AL
OUT DX, A
(P. DX) (AX)
P bit port no
Port ADD Data P8
8 bit
16 bit
8 bit
16 bit AL DX AX
Port address may be in 8 bit or 16 bits
8 bits – A0 – A7
16 bits – A0 – A15

4. Programmable Peripheral Interface (PPI) Intel 8255
A port can be input port or output port
Generation of I/O ports using digital circuits is possible but is cumbersome.
In addition some I/O devices require handshaking protocol for data transfer.
Intel has designed programmable peripheral interface (PPI) 8255 chip for this purpose.
Intel 8255 has 24 I/O lines distributed to four ports.
Port A lines, Port B lines
Port C (Upper) lines, Port C (Lower) -4 lines
Each port can be programmed to be input or output
Ports have been put in two groups
Group A - Port A ( PA7 – PA0)
Port C (Upper) (PC7 – PC4)
Group B - Port B ( PB7 – PB0)
Port C (Lower) (PC3 – PC0)

5. The 8255 block diagram is shown in Fig 1
The 8255A block diagram

6. D7 – D0 - used for data transfer between µP and 8255
Pins and signal
D7 – D0 - used for data transfer between µP and 8255
(Bi directional) RD
(Input) - Read control signal
WR - Write control signal
(Input)
Reset - Resets the ports. Ports are configured as input ports
(Input) on reset
CS - Used to select the 8255 chip. Chip is selected based on address decoding
A1, A0 - are used to select specific ports in A1, A0 are lower 2 lines of address lines
Issued by µP

7. A1, A0 = Port A, Port B
10 - Port C, Control register
Note : - There is no separate selection for Port C (Upper) or Port C (Lower).
Port C is selected as a whole i.e. Both port upper and lower ports are selected when A1, A0 = 10
Control register is used to program the
Ports as input or output
Program the I/O mode.
The I/O ports can be programmed to work in any of the 3 modes.
mode 0 - Basic Input – Output
mode 1 - Strobed Input – Output
mode 2 - Strobed bidirectional bus.
Mode 0 - Basic Input – Output
- Majority of applications a under this mode
- Any port A, B, C (U) or C (L) can be input or output.

8. Mode 1 - Strobed Input – Output
- provides means for transferring I/O data to or from specified port in conjunction with strobes or handshaking signals.
- Port C lines used for handshaking signals.
- Port A and Port B can be used as input or output.
- Port A uses Port C (Upper) lines for handshaking – Group A
- Port B used Port C (Lower) lines for handshaking – Group B
Mode 2 - Strobed bidirectional bus.
- Port A can be used for input as well as output for transmitting as well as receiving the data in conjunction with handshaking signals on Port C.
- Handshaking signals are provided to maintain proper bus flow discipline.
- 5 bits ( PC7 – PC3) of port C are used for handshaking.
- Mode 2 is available for only Group A
- Parallelly Port B can be used in mode 0 or mode 1.

9. 8255 ports can be configured using control register (A1, A0 = 11)
Control word
Configuring 8255
8255 ports can be configured
using control register (A1, A0 = 11)
Control word format of
the 8255 PPI

10. Thus D7 = 1, D6, D5 = 00 – mode 0, D4 = 1 (port A = Input)
Example We need to select Port A as Input Port B as Output, Port C (L) as Output , Port C(Upper) as Input.
mode = 00
Note - Mode set flag i.e. D7 =1 for all configurations. If D7 =1 , then only mode settling will be done by 8255.
Thus D7 = 1, D6, D5 = 00 – mode 0, D4 = 1 (port A = Input)
D3 = (Port C (Upper) = Input), D1 =0, (mode = 0),
D1 = 0 (Port B= Output), D0 = 0 (Port C (Lower)= Output)
The configuration byte is
=98H
Thus by transferring 98H to control register of 8255, we may configure 8255 in the above manner. 1

11. 8255 – 8086 Interfacing - 8 Bit Input - OutputRD WR
D0 8255
D7 PPI A0 A1 CS
Data bus
control bus
Address bus
8086 µP
M / IO EN
Decoder
Interfacing the 8255 PPI to the 8086 microprocessor

12. 8255 - 8086 Interfacing – 16 bit Input – Output
(A2 – A15)

13. Address Decoding for 8255
Example Interface 8255
Such that Port A address = E000H
Port B address = E001H
Port C address = E002H
Control register address = E003H
Bit Pattern –
A15 A14 A13 A12 A11 A10 A9 A8 A7 A6 A5 A4 A3 A2 A1 A0
A1 and A0 are input to so when
A1, A0 = 00 – Port A, A1 A0 = 01-Port B , A1 A0 = 10 Port C ,
A1 A0 = 11 – Control Register.
(A15.A14.A13.A12.A11.A10.A9 A8.A7.A6.A5.A4.A3.A2.(M/IO)’)’ = CS of 8255
This can be realized using logic gates.

14. Using 74LS138
C B A
A4 A3 A2
Y CS
M/IO G1
G2 A and G2 B will have signals distributed so that G2 A = 0 and G2 B = 0
One combination
(A15.A14.A13)’ G2B
(A12.A A5)’ G2A
Example Interface 3 seven segment LEDs and 3 LEDs in common anode mode using 8255 at address 00H
- Each LED require one line
we may use - Port A lines A0, A1, A2 for 3 LEDS
- Seven segment LED’s in serial mode
- 2 lines Code bit - B0
Pulse - C0

15. Cascading of seven-segment LEDs in a serial microprocessor interface.
Code
bits
Clock

16. h g f e d c b a
74164 a h 5V A2 A1 A0
8255 C0 B0 CS
Code bit
Clock

17. ; Configure 8255, Port A = output
To display - A -
h g f e d c b a
= 88H
; Configure 8255, Port A = output
Port B = output, Port C = output, mode = 00
= 80H
MOV AL, 80H
OUT 03, AL
;To switch on LED at A0
MOV AL, FEH; 0 will light the LED
OUT 00, AL; a f b g e c 1

18. ;To switch on LED connected to A2 and A1
Port A = = F9H
MOV AL, F9H
OUT 00, AL
;To write ‘A’ in segment 1
MOV AL, 88H
MOV CL, 07; counter [MOV CX, 07]
loop1: MOV DL, AL; save AL
OUT 01, AL LSB has gone to code bit
;Pulse
MOV AL, 00H;C0 = 0
OUT O2, AL
MOV AL, 01H
OUT 02, AL
MOV AL, 00H
OUT 02H, AL
;Next bit
MOV AL, DL
ROR AL [SHR AL]
DEL CL
JNZ LOOP1 LOOP LOOP1

19. Keyboard Interfacing

20. Code table for 8X8 keyboard
I = Row No.
J = Col No.
Table Index = (I x 8) + J
for I = 0 to 7
J = 0 to 7
_______________________________
For I = 1 to 8, J = 1 to 8
Table Index = (I - 1) x 8 + (J - 1) - for 8 bit entry
= (I – 1 ) x 16 + (J - 1) x 2 - for 16 bit entry.

21. Keyboard- Microprocessor interface Software flowchart

22. Row connected to Port A; Port A = Output
8x8 keyboard
Row connected to Port A; Port A = Output
Column connected to Port B; Port B = Input
NCYCLE: MOV BL, 01 (BL contains row n)
; send high signal on a 1st row
L1: MOV AL, BL
OUT 00, AL
;Read all columns in the row
IN AL, 01
;check if AL = 00
CMP AL, 00
;If 00 then no key pressed
JZ Loop1 for next ROW
;Find 1 in AL and thus key no.
Port A = output
Port B = Input

23. ;To configure 8255
;Port A = Output , Port B = Input, mode =00
= 82H
MOV AL, 82H
OUT O3, AL
LOOP 1 : CMP BL, 80H ; check if scanning of all rows completed
JE NCYCLE
SHL BL
JMP L1; Go to activate next row

24. .Data
Table 1 DB ‘A’ ‘B’ ‘C’ ‘D’ ‘E’ ‘F’ ; for 8 bit entries
Table 2 DW ‘AA’ ‘BB’ ‘CC’ ‘DD’ ‘EE’ ‘FF’ ; for 16 bit entries
KEYSCAN Procedure - Scans the keyboard and presents row no of key pressed in BL . Col. No. of key pressed in BH . If no key pressed then AL = FFH
; Configure 8255
= 82H
Port A = rows – Output, B = column = Input , C = Output, mode = 00
MOV AL, 82H
OUT 03, AL
Loop1: CALL KEYSCAN
CMP AL, FFH
JE LOOP1
; Find the index of memory location-
; (I-1) * 8+(J – 1) for 8 bit
; (I-1) * 16 +2*(J – 1) = ((I-1) * 8+(J – 1) )*2 for 16 bits
DEC BL ; (I-1)
SHL BL, 3; (I-1) * 8

25. KEYSCAN PROC NEAR
; Row No in BL, Col. No. is BH
;Counter in CL
;Initialize Row No. – Row = 01
MOV BL, 01H
;Initialize Row Counter
MOV CL, 01
; Send high to row i.e. Energize Row
;STRT: MOV AL, BL
OUT 00, AL
; Scan Columns
IN AL, 01
CMP AL, 00
JNZ KPRSD
NX Row: SHL BL
INC CL
CMP CL, 08
JLE STRT
JMP KKR;--- Return.

26. TABLE 1 - 8 bit entries. 0301F Row 4 03017 Row 3 03010 0300F 15 03009
03008
03009
03002H
03007H
03001H
03000H D E B C A N M
Row 4
Row 1
Row 2
Row 3 7 15 8

27. TABLE 2 - 16 bit entries. 040E0 Row 2 04010H 0400EH Row 1 04002H

28. Programmable Interval Timer Intel 8254
Utility of timer / counter in a system.
- Facilitate accurate time delay without interfering with program execution.
- Event counter to count signal events representing real life events.

29. Timer / counter modes in 8051
- Two Timer/ counters – TH0, TL0 , TH1, TL1
- UP counter – 16 bit
Mode (set using T MOD)
- mode bit counter
- mode bit counter
- mode bit with auto reload
- mode 3 - split into two 8 bit counter
- Timer / counters controlled using T CON
Input Pulse
Timer mode - clock pulse from OSC of 8051
Counter mode - External clock pulse
T MOD
TCON
Gate
C/T M1 M0
Timer 1
Timer 0
TF1
TR1
TF0
TR0
IE1
IT1
IE0
IT0
Timer
Interrupt

30. Functional block diagram of the 8254-chip

31. - Intel 8254 has 3 - 16 bit programmable timer / counters.
- The counters are down counters as against 8051, where the counters are up counters.
- The programmer can configure the 8254 to match his requirement ( using control word ).
- The programmer may initialize any counter by loading a desired preset value.
- The 8254, on receiving the command from CPU starts counting and sends a output signal on completion. The signal may be used to interrupt the CPU if required.
- Each counter can operate as binary or BCD.
- Each counter has 2 inputs – CLOCK and GATE and 1 output – OUT.
- In case of timer operation the PCLK from 8086 is fed to CLOCK.
- In case of counter ,the pulses coming from circuit are connected to CLOCK.

32. - The clock frequency for 8254 may be up to 10 MHz
up to 8 MHz – Intel 8254
up to 10 MHz – Intel
- The GATE input acts as Trigger or Enable depending on the mode.
Operating modes.
8254 may operate on any one of the 5 operating modes.
Mode Interrupt on terminal count.
- GATE input acts as enable or disable the counting. When GATE = High, Counting is enabled and when GATE = Low, counting is disabled.
- When preset count value is loaded to selected count register, OUT is low initially.
- When GATE = High, counter starts counting.
- When Count becomes Zero. (note – it is down counting here ) , - OUT become high.
- OUT can be connected to interrupt pin (NMI or INTR) of 8086.
Note :- Counting starts one clock cycle after the count is loaded.

33. Mode 0 - Interrupt on Terminal count

34. Mode 1 – Programmable one shot
- GATE input acts as trigger and a trigger pulse is input at the gate .
- Initially OUT is High. Preset count is loaded
- OUT is high.
- Trigger pulse at GATE is supplied , OUT goes low in synchronization with CLK, and counting starts.
- When counts becomes Zero,
- the OUT becomes high.
- OUT remains High till trigger is supplied at GATE, [OUT will become low at clock pulse following the trigger]
Thus a low pulse can be created at OUT . The duration of pulse can be programmed through count.
- If a trigger is supplied when counting is in progress. Counter is again reloaded OUT remains low till terminal count. Thus duration of pulse can be elongated.

35. Mode 1 - Programmable one shot.

36. Mode 2 - Rate Generator
GATE acts as disable/enable signal for counting.
When GATE = High – counting is enabled
= Low – counting is disabled.
- Counter acts as divide by N counter, i.e. It generates a clock pulse at OUT at regular interval programmed through preset count value.
- OUT is initially High.
- As soon as Count is loaded, counting starts
(Provided GATE = High)
- When Count becomes 1 ( i.e. One less than terminal count ),
- OUT becomes low for one clock pulse.
- OUT becomes high, count is reloaded and operation restarts.

37. Mode 2 - Rate Generator

38. Mode 3 - Square Wave Generator
- GATE acts as Enable/Disable signal for counting.
- When GATE = High, counting is enabled, when GATE = Low counting is disabled.
- Mode 3 is similar to mode 2.
- OUT is high initially
- When count is loaded , counting starts. When count value has become ½ of preset value, OUT becomes low.
- When count becomes 0 i.e. Terminal count,
- OUT becomes High
- Preset count is reloaded
- Operation restarts
Thus a square wave is generated at OUT. The Pulse width depends on the count value.

39. Mode 3 - Square wave generator

40. - If count = n = even then
OUT uptime = n/2, OUT down time = n/2 clock pulses.
- If count = n = odd then
OUT – uptime = (n+1)/2, OUT down time = (n-1)/2 clock pulses.
Thus a clock pulse of desired frequently can be produced.
Mode 4 - Software Triggered Strobe( similar to mode 2 )
- GATE acts Enable/Disable signal for counting
When GATE = High, Counting enabled
When GATE = Low, Counting disabled. OUT is initially High.
- When Preset count is loaded ( and GATE = High ), counting starts.
- When Count becomes Zero, OUT becomes low for one clock period. Thus a pulse can be generated at OUT at desired instant depending on preset count value.
- The OUT becomes high again and remains high.

41. Mode 4 - Software Triggered strobe

42. Difference between mode 2 and mode 4
Let us say preset count value = 10
Mode 2 - When count becomes 1 then OUT becomes 0 for one clock period. Preset value is reloaded and operation restarts. Thus pulses are produced continuously in mode 2
Mode 4 - When count reaches terminal count i.e. 0, OUT becomes low for one clock period. No continuous pulses are generated.
Mode 5 - Hardware Triggered strobe.
- GATE acts as trigger to initiate counting.
- OUT is High initially. When preset Count is loaded and low trigger pulse is applied at GATE counting starts.
- When Count becomes Zero, OUT goes low for one clock period.
In mode 4 , occurrence of pulse at OUT controlled by instruction loading the preset value.
In Mode 5, occurrence of pulse at OUT controlled by low trigger pulse at GATE. Thus the name Hardware Triggered Strobe.

43. Mode 5 - Hardware Triggered strobe

44. Programming the 8254
counters may be programmed using control word
Control word format
SC1 SC0 RW1 RW0 M2 M1 M0 BCD
SC1, SC0 - Used for counter selection
= 00 – counter 0, 01 – counter 1, 10 – counter 2
11 – Used for Read back command.
M2 , M1 , M0 - Used for mode selection
= 000 – mode 0, 001 – mode 1, x10 – mode x11 – mode 3, 100 – mode 4 , 101 – mode 5, (X = don’t care).

45. BCD - Selects Binary or BCD counting
= 0 - Binary counting , 1 – BCD counting (4 – decades)
RW1, RW0 - Identify read / write operation for count.
0 0 - Counter latching operation. Used when programmer want to read the contents of any counter on the fly. i.e. Without disturbing the counting.
0 1 - Read/write least significant byte.
1 0 - Read/write most significant byte
Read/write least significant byte followed by most significant byte

46. 0 1 - Read /write least significant byte
8254 Control Word Format
0 0 - counter latching
0 1 - Read /write least significant byte
1 0 - Read /write most significant byte
1 1 - Read /write least significant byte followed by most significant byte
SC1
SC0
RW1
RW0 M2 M1 M0
BCD
Counter
selection
Read/ write
Operation for count
Mode Selection
= 1 - BCD counting
= 0 - Binary

47. Loading value to counter
- For each counter
- Control word must be written before preset count loaded.
- Preset count must follow the count format i.e.
RW1 RW0 = 01 – least significant byte only,
= 11 – least significant byte followed by most significant byte.
Read value from counter - Two methods
First method is “read on the fly” (Also called counter latch command)
To achieve this
- Control register is loaded with special control word as shown below:

48. The 8254-2 counter latch control word.
Select counter
00 = counter 0
01 = counter 1
10 = counter 2
11 = counter read back command

49.
SC1 SC0 0 0 x x x x
SC1, SC0 - Specify the counter.
- The content of counter are latched into a storage register associated with counter.
- A simple I/O read operation [IN] will load the content of the counter.
Second method is to read the content of counter using Read Back command.
By using this command , programmer can check the
- Count value
- Programmed mode
- Current state of OUT pin
- NULL count Flag of selected counter.
The format of Read back command is

50. The 8254-2 Read-back control word.

51. -. By loading Read Back command to control register the count
- By loading Read Back command to control register the count bits of all selected counters are latched.
- Using I/O Read operation on counter will get the count
- For finding the status, bit 4 i.e.ST should be 0.
- The status of all selected counters will be latched. When Read back command for status is sent to control register.
Note : - Both status and count can’t be read by one command.
The format of status register is shown.

52. FIG 9
The status register

53. { The status register shows the -status of OUT pin
-Whether current count is NULL i.e. Is counter is in NULL state.
-How the counter was programmed i.e. Mode-M2, M1, M0
BCD and RW1, RW0.
Example
8254 needs to be interfaced at location 0800H so that port addresses will be
0800H - counter 0 port address
0801H - counter 1 port address
0802H - counter 2 port address
0803H - control register port address
A15 A A11 A8 A7 A4 A3 A2 A1 A0 {
Connected directly to 8254

54. Address Decoding by simple logic
((A15.A14.A13.A12).(A11.A10.A9.A8).(A7.A6.A5.A4).(A3.A2. (M/IO)’))’
To CS pin of 8254
- A0 and A1 connected to to 8254.
- For timing operation PCLK signal may be connected to CLK of counter.
If 15 MHz crystal at X1, X2
CLK MHz – 33 % duty cycle
PCLK MHz, 50% duty cycle.
- To determine control word.
For Counter 0 mode = i.e.
- Interrupt on Terminal Count
- Binary mode.

55. - ; Load 30H to control Register. MOV AL, 30H
Count = 0EF6H
Control register =
= 30H
- ; Load 30H to control Register.
MOV AL, 30H
MOV DX, 0803H; Port address loaded to DX.
OUT DX, AL
- ; Load count – LSB to counter 0
MOV AL, F6H
MOV DX, 0800H
- Load count – MSB to counter 0
MOV AL, 0EH
Counter 0
Mode 0
For Binary
Read/ write
LSB then MSB

56. - To read the content of counter at any time.
- If GATE =1 then counting will start automatically. GATE can be connected to 8255 line and made 1 by software.
- When Count becomes Zero. The OUT will become High. It can be used to interrupt 8086 by connecting to NMI.
- To read the content of counter at any time.
- By using `counter latch command’
command =
SC1 SC0 0 0 x x x x
= 00H
; To load command to control register
MOV AL, 00H
MOV DX, 0803H
MOV DX, AL
For
Counter 0

57. MOV DX, 0800H; Port address of counter 0.
; To read count
MOV DX, 0800H; Port address of counter 0.
IN AL, DX; LSB of count loaded
MOV BL, AL
IN AL, DX; MSB of count loaded
MOV BH, AL
; Now BX contains the count.
To read count using “read back command” command =
= D2H 1
CNT ST
CNT2
CNT1
CNT0
To read
count
For counter 0
only

58. ; To load command
MOV AL, D2H
MOV DX, 0803H
OUT DX, AL
; To read count
MOV DX, 0800H
IN AL, DX; LSB loaded
MOV BL, AL
IN, AL, DX; MSB loaded
MOV BH, AL
; Now BX contains the count
Example
(a) Counter 1 of 8254 in to be used to generate 10KHz tone with 50% duty cycle using clock frequency of 10 MHz . Explain the mode of operation and initialization.

59. clock period = 1/10 10-6 Sec =0.1Microsecond 10 KHz frequency
(b) Counter 2 of 8254 timer /counter is connected to 5 KHz clock. The OUT signal must intermittently glow or not glow LED connected to it in common cathode fashion. The time duration between glow and not glow is 5 sec. Explain the mode of operation and initialisation.
Solution
(a) 10 MHz frequency
clock period = 1/ Sec =0.1Microsecond
10 KHz frequency
clock period = 1/ Sec =0.1 millisecond
0.1 millisecond = 0.1 Micro sec x 103
i.e. In one clock period of 10 KHz frequency there are 1000
clock periods of 10 MHz frequency.
10 KHz
10 MHz

60. - Mode to be programmed = 3 i.e. Square wave generator
- If we wish to produce 10 KHz at OUT then it must remain High for 500 counts and low at 500 counts regularly.
- Mode to be programmed = 3 i.e. Square wave generator
count value = 1000 = 03E8H
control register =
=77H
Note : - If we program it as BCD the count can be stored as 1000H other wise in binary it will be started as 03E8H
SC1
SC0
RW1
RW0 M2 M1 M0
BCD
Counter 1
Read/ write
LSB then MSB
Mode 3
BCD

61. MOV DX, CR – AD ; control register address OUT DX, AL
MOV AL, 77H
MOV DX, CR – AD ; control register address
OUT DX, AL
MOV AL, 00H [MOV AL, E8H] for binary
MOV DX, CNT -1
OUT DX, AL - LSB loaded
MOV AL, 10H [MOV AL, 03H] for binary
OUT DX, AL - MSB loaded
(b)
- 5KHz clock - Clock period = 1/ sec = 0.2 millisecond
- In 5 second – No of clock periods of 5 KHz = 5x5x103 = 25000
- For 5 sec OUT must be High , then LOW for 5 sec and this must be repeated
OUT
<- 5 sec ->

62. Mode to be programmed = 3 i.e. Square wave generator.
Count value for 10 sec = decimal = C350H
Control Register =
= B6H
SC1
SC0
RW1
RW0 M2 M1 M0
BCD

63. - 15 MHz crystal frequency - 5 MHz clock frequency
Example C
To generate 1Hz signal using 15 MHz crystal frequency (at 8086)clock pulse using 8254 timer/counter.
- 15 MHz crystal frequency
- 5 MHz clock frequency
2.5 MHz PCKL frequency ( 50 % duty cycle )
To produce 1 Hz frequency.
In1 clock period of 1 Hz frequency clock-No. of 2.5 MHz clocks are – 2.5x106 =
Thus it is more than Max no in 16 bits i.e. FFFFH (65535 decimals)
Even if we load maximum no. In counter we get signal of frequency = /65535 = 38.14Hz
Thus we have to use two counters. The output of one counter will become the clock pulse of second counter.
The 2.5 MHz clock frequency = 2.5 KHz X 1KHz
To produce 2.5 KHz from 2.5 MHz
count = 1000, mode = 3
Counter 0
Counter 1

64. - Counter 0 – works in mode 3
To produce 1Hz from 2.5KHz
count = 2500, mode = 3
- Counter 0 – works in mode 3
count (BCD) = 1000, clock = 2.5MHz, OUT = 2.5 KHz
- Counter 1 – mode 3
count (BCD) = 2500, clock = 2.5KHz, OUT = 1Hz
8255 Port A A0 A1
Counter 0
Counter 1
CLK
2.5 MHz from PCLK
GATE = High
(mode = 3)
2.5 KHz
1 Hz

65. Counter 0 - Initialization
= 37H
MOV AL, 37H
OUT CR-P, AL
MOV AL, 00H
OUT CR-0, AL
MOV AL, 10H
SC1
SC0
RW1
RW0 M2 M1 M0
BCD 2 1 3
Counter 0

66. Counter 1 - Initialization 7 6 5 4 3 2 1 0 0 1 1 1 0 1 1 1 = 77H
= 77H
MOV AL, 77H
OUT CR-P, AL
MOV AL, 00H
OUT CR-1, AL
MOV AL, 25H
; Configure 8255
; All ports Output
;Control Word = 80H
MOV AL, 80H
OUT CR-8, AL
; Send GATE input
MOV AL, 03H
OUT PA-8, AL
SC1
SC0
RW1
RW0 M2 M1 M0
BCD 1 2
Counter 1 3 1 2

67. Example D
To incorporate delay of 1 sec using 8254 interfaced at 0800H and interfaced at 0F00H.
Port address - 0F00H - Port A F01H - Port B
- 0F02H - Port C
- 0F03H - Control Register
Address H - Counter 0
H - Counter 1
H - Counter 2
H - Control Register.
- Assume – 8086 is using 10 MHz frequency (30 MHz – crystal frequency)
PCLK frequency = 5 MHz, Clock period = 0.2 Micro seconds
Counter 0 is used for incorporating the delay
In counter 0- CLK0 connected to PCLK

68. -. This can be solved in many ways. Once solution is similar to
- This can be solved in many ways. Once solution is similar to previous example i.e. Use of more than 1 counter
Counter 0 – Mode 3, Generate 5KHz tone at output.
Counter1 – mode 0 –
Interrupt on terminal count to generate pulse at the end of 1 sec