GPS Enhanced PFD System Software Presentation Eric Grossmann

Presentation Summary General System Specifications Timeslice Kernel Tasks Modules Data Flow Diagram Individual Task Descriptions CPU Load

MCU PSOC 1 CY8C Digital Blocks & 6 Analog Blocks Bus Frequency: 24 MHz Timeslice Kernel Timeslice Period:100 ms Memory Available: 16k Flash 1k RAM Memory Requirement: Less than 1k Flash 1k RAM General System Specifications

Startup Task Acceleration Detect Task Immersion Detect Task Switch Detect Task GPS Rx Task Tx Task Timeslice Kernel Tasks

Initializes the system Execution Time: 100ms worst case. Period: Once at Startup Startup Task

Observes hex output from the sensor Passes a hex output to the MCU. Period 100ms Execution Time 5 μ s Acceleration Detect Task

Observes changing voltage from the sensor Converts the voltage into digital format Passes voltage level as a hex output to the MCU. Period 100ms Execution Time 5 μ s Immersion Detect Task

Waits and recognizes a voltage level on a toggle switch. De- bounces the switch. Period: 1s Execution Time: 10 μ s Switch Detect Task

Observes hex output from the sensor Passes a hex output to the MCU. Period 300s (sporadic) Execution Time 5 μ s GPS Rx Task

Observes hex output from the MCU Passes a hex output to the Transmitter module. Period 300ms (sporadic) Execution Time 5 μ s Tx Task

Modules ModuleTasks Public Functions & Data GPSPFD.cStartup Task Acceleration Detect Task Immersion Detect Task GPS Rx Task Tx Task GLevel OvrBrd GPSData RescMe() GPSID Switch.cSwitch Detect TaskSwitchState

Max CPU Load 5us/100ms + 5us/100ms + 10us/1000ms + 5us/300000ms + 5us/300000ms = 0.01% CPU Load CPU Load

GPS Module GPS Rx Task GPSData Accelerometer Sensor Acceleration Detect Task GLevel Immersion Sensor Immersion Detect Task OvrBrd Toggle Switch Switch Detect Task SwitchState Transmitter Module Tx Task GPSID Data Flow Diagram HardwareGPSPFD.c