Fowler-Nordheim Tunneling in TiO2 for room temperature operation of the Vertical Metal Insulator Semiconductor Tunneling Transistor (VMISTT) Lit Ho Chong,Kanad Mallik, and C H de Groot School of Electronics and Computer Science University of Southampton, UK Funding: EPSRC, UK

Overview Motivation: operation of metal oxide tunnel transistor (MOTT) Design of the VMISTT Fabrication of the tunnel barrier Characterization of the tunnel barrier Conclusions

Motivation Downscaling of MOSFET Faster chips More transistors per unit area As feature sizes decrease, the MOSFET has problems: Short Channel Effects Fluctuation of threshold voltage due to random dopants in channel Gate tunneling high-k dielectrics source drain Gate oxide gate

Metal Oxide Tunnel Transistor (MOTT) Operating Principle Fowler-Nordheim Tunneling through the oxide barrier. The tunnel barrier width is modulated by gate bias. source tunnel barrier drain e Drain Bias only (without gate) fB e Drain Bias & Positive Gate Bias Source Metal Oxide Drain Gate Gate Oxide Fujimaru et al. Appl. Phys. 85 (1999) 6912, Snow et al. Appl. Phys. Lett. 72 (1998) 3071.

MOTT: Advantages & Disadvantages Scalability to nanoscale High speed No short channel effects no single crystal Si Disadvantages: uncoventional fabrication operation at 100K only no complimentary device Schottky Emission fB Poole Frenkel e e FN Tunneling Source Tunnel Barrier Drain

Vertical metal insulator semiconductor tunnel transistor VMISTT Silicon drain complimentary device possible requires correct tunnel barrier height and metal workfunction Vertical structure: Tunnel barrier better controlled surrounding gate Drain Metal oxide Source gate gate oxide Source Metal oxide Drain

Tunnel Barrier Criterion for tunnel barrier: Fabrication process: low barrier height for Fowler-Nordheim tunneling high barrier height to suppress Schottky leakage required: 0.4-0.6 eV for both bands TiO2 has optical bandgap of 3eV with 1eV per band Fabrication process: Thermal oxidation of vacuum evaporated Ti. Device for characterization: Metal-insulator-Semiconductor (MIS) capacitors/diodes

Fabrication of the Tunnel Oxide aluminium titanium dioxide 10nm Ti p-type Si Evaporation of 7nm or 10nm Ti on Si substrate Oxidation at 450oC, 500oC, and 550oC for 30min. Metallization

Cross-section of a Typical TiO2 Layer ~20 nm Si

Current Voltage Measurement higher oxidation temperature for stoichiometry of TiO2 but also larger SiO2 interfacial layer symmetry of the positive and negative bias indicates small interfacial layer. estimated interfacial SiO2 layer(~1nm). alloy/anneal causes Al diffusion and larger leakage (not plotted)

Capacitance-Voltage Measurement

Capacitance-Voltage Measurement no saturation in accumulation quantum effect: accumulation layer width decreasing capacitance with increasing oxidation higher dielectric constant thicker interfacial layer dielectric constant: k~30 similar to TiO2 grown by chemical vapor deposition Campbell et al. IEEE Trans. E D 44 (1997) 104.

Fowler-Nordheim Tunneling

Fowler Nordheim Tunneling Dominant current transport mechanism for > 2 V Al/TiO2 and Si/TiO2 barrier height ~ 0.4eV for 10nm film. electron tunneling assumed,but to be confirmed by changing the workfunction of the metal Observed at RT, and confirmed at low temperature. Temperature dependence due to semiconductor carrier injection Ti[nm] T [oC] k φ[eV] 7 450 36 0.32 500 33 0.30 550 27 - 10 28 0.36 24 0.46 22 0.40

Hopping Conduction sole source of leakage at low temperature

Schottky-barrier Emission room temperature leakage mechanism

Temperature Dependence of Current Temperature dependence independent of mechanism Si carrier injection limited Boron incomplete ionization recombination time Atlas device simulations show large temperature dependence of Fowler-Nordheim tunneling

Conclusions Vertical Metal Insulator Tunnel Transistor (VMISTT) complementary device with easy fabrication based on gate modulation of Fowler-Nordheim tunneling TiO2 layers grown by thermal oxidation of evaporated Ti The Al/TiO2 and Si/TiO2 tunnel barrier height ~ 0.4 eV. Schottky-barrier emission leakage at room temperature. hole and electron tunneling to be investigated by using n-type and p-type Si and Al and Pt metal Fabricate transistor!