ECE 353 Introduction to Microprocessor Systems Michael J. Schulte Week 9

Topics I/O port basics I/O ports with MSI devices  P compatible devices Address decoding for isolated and memory-mapped I/O Conditional I/O 80C188EB integrated I/O unit 82C55A PPI

I/O Port Basics I/O subsystems allow CPU to interact with the outside world Input, output, and combined I/O blocks Input ports Byte Word Output ports Byte Word Unconditional I/O

MSI I/O Ports Medium Scale Integration (MSI) circuits are available to construct ports Simple byte input ports can be constructed from… Octal buffers Octal registers Simple byte output ports can be constructed from octal latches

 P Compatible I/O Devices Complex I/O devices typically require complex interface and control logic  P compatible I/O devices have the necessary logic built in to the device itself Interface designed to be reasonably compatible with many microprocessor buses Need to add decoding/selection logic Examples Device controllers Used to control complex I/O devices (LCD, disk drives, etc.) Generic model

I/O Address Decoding I/O address decoding determines the logical location of the I/O device Isolated I/O Memory-mapped I/O Input vs. output ports Same address does not guarantee same function! Device select pulses Wait states Using the CSU with I/O devices

I/O Address Decoding (cont.) PAL/PLA Decoders Nonspecific I/O strobes /IOW /IOR Linear selection Conventional decoders Device select strobes Cascading

Conditional I/O Conditional vs. unconditional transfers Hardware example Polling Overhead Flags / semaphores Wait loops Timeouts Software exercise Possible race condition

80C188EB Integrated I/O Unit Port 1 Functions Port 2 Functions Bidirectional pin structure Synchronizer Programming Port Control Register Port Direction Register Port Data Latch Register Port Pin State Register

82C55A Programmable Peripheral Interface (PPI) LSI device providing 24 bits of I/O Logical organization Block diagram Software configurable ports Three modes of operationmodes  Mode 0 Basic Input/Output ports  Mode 1 Strobed Input/OutputInputOutput  Mode 2 Bidirectional data bus Bit set/reset capability

Real-World Example Interface the MAX154 8-bit, 4-channel ADC to the 80C188EB Hardware interface  Use /GCS0 at I/O address 1000h (CSU)CSU  Poll conversion status using Port 2.Port 2 P2CON / P2DIR / P2LTCH / P2PIN P2CONP2DIRP2LTCHP2PIN Software interfacing  Write a procedure that does an ADC conversion and then reads the ADC value using mode 1  Input: AL = ADC input channel to use (0-3)  Output: ADC value returned in AL What about mode 0? Timing?

Byte Input Port Example

Byte Output Port Example

74HC540/541

74HC573

74HC574

MAX1200

AD7865

Generic Device Controller (Fig )

Hitachi HD44780U LCD Controller

Port 1 Functions

Port 2 Functions

Bidirectional Port Pin

Port Control Register

Port Direction Register

Port Data Latch Register

Port Pin State Register

Conditional I/O Exercise Write a procedure to read data from an input device like the hardware example. Assume that the flag is a READY signal (active high). If the device does not become ready after 1 million polling attempts, return with the carry flag set, otherwise, return with the data in AL and the carry flag cleared.

82C55A Block Diagram

82C55A Modes of Operation

82C55A Mode 1 Input

82C55A Mode 1 Output

Chip- Select Start Reg

Chip- Select Stop Register - Part 1

Chip- Select Stop Register - Part 2

Conditional I/O Example

Synchronization