The LC-3 – Chapter 5 COMP 2620 Dr. James Money COMP 2620 1.

Slides:



Advertisements
Similar presentations
Chapter 5 The LC-3.
Advertisements

Introduction to Computer Engineering ECE 252, Fall 2010 Prof. Mikko Lipasti Department of Electrical and Computer Engineering University of Wisconsin –
The LC-3 – Chapter 6 COMP 2620 Dr. James Money COMP
1 System Calls (TRAPS) and Subroutines Patt and Patel Ch. 9.
Chapter 9 TRAP Routines and Subroutines. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 9-2 Subroutines.
The LC-3 – Chapter 7 COMP 2620 Dr. James Money COMP
CS25410 Memory Machine Code. Common types of non-rotating memory (1) RAMRandom Access Memory In reality, read/write memory This is usually volatile, meaning.
Interrupts Chapter 8 – pp Chapter 10 – pp Appendix A – pp 537 &
The LC-3 – Chapter 6 COMP 2620 Dr. James Money COMP
Chapter 5 The LC-3.
Chapter 4 - ISA 1.The Von Neumann Model. 4-2 The Stored Program Computer 1943: ENIAC Presper Eckert and John Mauchly -- first general electronic computer.
S. Barua – CPSC 240 CHAPTER 5 THE LC-3 Topics Memory organization Registers Instruction set Opcodes.
Overview The Operate Instructions - ADD, AND, NOT The Data Movement Instructions - Load, Load Address, Store Example Using Operate & Data Movement The.
Overview Program in LC-3 machine language Use the Editor
Overview Review Trap Instruction Program in LC-3 machine language Use LC-3 Simulator.
LC-3 Instruction Set Architecture (Textbook’s Chapter 5)
Chapter 5 The LC-3 LC-3 Computer Architecture Memory Map
Chapter 6 Programming in Machine Language The LC-3 Simulator
Chap 4 & 5 LC-3 Computer LC-3 Instructions Chap 4 Homework – due Monday October 27 Chap 5 Homework – due Wednesday October 29 Project 2 Designs (Working.
S. Barua – CPSC 240 CHAPTER 9 TRAP ROUTINES AND SUBROUTINES The TRAP mechanism allows the user program.
LC-3 Instruction Set Architecture
Chapters 4 & 5: LC-3 Computer Architecture Machine Instructions Assembly language Programming in Machine and Assembly Language.
Assembly & Machine Languages
Computer Science 210 Computer Organization The Instruction Execution Cycle.
Chapter 5 The LC-3. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-2 Instruction Set Architecture ISA.
The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP
Chapter 4 The Von Neumann Model
The von Neumann Model – Chapter 4
The LC-3 – Chapter 7 COMP 2620 Dr. James Money COMP
Introduction to Computing Systems from bits & gates to C & beyond Chapter 5 The LC-3 Instruction Set Architecture ISA Overview Operate instructions Data.
Chapter 5 The LC Instruction Set Architecture ISA = All of the programmer-visible components and operations of the computer memory organization.
System Address Registers/Memory Management Registers Four memory management registers are used to specify the locations of data structures which control.
Introduction to Computer Engineering ECE/CS 252, Fall 2010 Prof. Mikko Lipasti Department of Electrical and Computer Engineering University of Wisconsin.
The LC-3. Copyright © The McGraw-Hill Companies, Inc. Permission required for reproduction or display. 5-2 Instruction Set Architecture ISA = All of the.
Chapter 5 The LC Instruction Set Architecture ISA = All of the programmer-visible components and operations of the computer memory organization.
Interrupt driven I/O. MIPS RISC Exception Mechanism The processor operates in The processor operates in user mode user mode kernel mode kernel mode Access.
The von Neumann Model – Chapter 4 COMP 2620 Dr. James Money COMP
Spring 20067W. Rhett Davis with minor modification by Dean Brock UNCA ECE 406Slide 1 ECE 406 Design of Complex Digital Systems Lecture 11: Data Converter,
The LC-3 – Chapter 5 COMP 2620 Dr. James Money COMP
Introduction to Computing Systems and Programming The LC-2.
The LC-3 – Chapter 5 COMP 2620 Dr. James Money COMP
The LC-3 – Chapter 5 COMP 2620 Dr. James Money COMP
F453 Module 8: Low Level Languages 8.1: Use of Computer Architecture.
1 Contents: 3.1 Instruction format and Addressing Modes 3.2 Instruction Introduction Chapter 3 Instruction system.
Computer Science 210 Computer Organization Machine Language Instructions: Control.
Chapter 9 TRAP Routines and Subroutines
Computer Science 210 Computer Organization
Chapter 4 The Von Neumann Model
Chapter 4 The Von Neumann Model
Computer Science 210 Computer Organization
Chapter 5 The LC-3.
The LC-3 Instruction Set Architecture Data Movement instructions
Chapter 4 The Von Neumann Model
LC-3 Details and Examples
Computer Science 210 Computer Organization
Chapter 9 TRAP Routines and Subroutines
Computer Science 210 Computer Organization
Computer Science 210 Computer Organization
Computer Science 210 Computer Organization
Introduction to Computer Engineering
Chapter 9 TRAP Routines and Subroutines
Computer Science 210 Computer Organization
Chapter 4 The Von Neumann Model
Chapter 9 TRAP Routines and Subroutines
Chapter 9 TRAP Routines and Subroutines
The Stored Program Computer
Interrupts and exceptions
Chapter 9 TRAP Routines and Subroutines
Chapter 9 TRAP Routines and Subroutines
Chapter 4 The Von Neumann Model
Presentation transcript:

The LC-3 – Chapter 5 COMP 2620 Dr. James Money COMP

Control Instructions Recall that there are three types of instructions – Data movement – Operate – Control The control instructions influence the PC value so that execution is no longer linear in nature

Control Instructions Recall, that so far we have only considered the branch instruction BRxxx. This instructions worked by comparing the condition codes against the flags set in the instruction and jumping to a new location if one matched appropriately We could get a unconditional jump using BRnzp

JMP Instruction One problem with the BRnzp instruction is it is limited in the range of addresses near the PC It had an effective range of -255…256 from the branch itself If we needed to branch to 2000 locations away, we could not easily do it

JMP Instruction The JMP (opcode = 1100) instruction will allow us to do this The JMP instruction loads the PC with the contents of a specified register in bits [8:6] All the remaining bits are 0. The change of the PC value always occurs!

JMP Instruction

TRAP Instruction The TRAP instructions changes the PC to a memory address that is part of the operating system The OS then performs a task on behalf of the program that is running We say the TRAP instruction invokes a SERVICE CALL

TRAP Instruction Bits [7:0] form the trap vector The trap vector is a number that identifies which service call that the OS needs to perform Hence, there are 256 possible trap vectors

When routine is done, PC is set to the instruction following TRAP. TRAP Instruction vectorroutine x23input a character from the keyboard x21output a character to the monitor x25halt the program