CPS3340 COMPUTER ARCHITECTURE Fall Semester, 2013 09/03/2013 Lecture 3: Computer Performance Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE.

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Presentation transcript:

CPS3340 COMPUTER ARCHITECTURE Fall Semester, /03/2013 Lecture 3: Computer Performance Instructor: Ashraf Yaseen DEPARTMENT OF MATH & COMPUTER SCIENCE CENTRAL STATE UNIVERSITY, WILBERFORCE, OH 1

Review  Last Class  Definition of Computer Performance  Measure of Computer Performance  This Class  Computer Performance  Power Wall  Assignment 1  Next Class  Computer Logic  Boolean 2

Performance Summary  Performance depends on  Algorithm: affects IC, possibly CPI  Programming language: affects IC, CPI  Compiler: affects IC, CPI  Instruction set architecture: affects IC, CPI, T c The BIG Picture 3

Power Trends  In CMOS IC technology §1.5 The Power Wall ×1000 ×30 5V → 1V 4

Reducing Power  Suppose a new CPU has  85% of capacitive load of old CPU  15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance? 5

Uniprocessor Performance §1.6 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency 6

Multiprocessors  Multicore microprocessors  More than one processor per chip  Requires explicitly parallel programming  Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer  Hard to do Programming for performance Load balancing Optimizing communication and synchronization 7

Manufacturing ICs  Yield: proportion of working dies per wafer  §1.7 Real Stuff: The AMD Opteron X4 8

AMD Opteron X2 Wafer  X2: 300mm wafer, 117 chips, 90nm technology  X4: 45nm technology 9

Integrated Circuit Cost  Nonlinear relation to area and defect rate  Wafer cost and area are fixed  Defect rate determined by manufacturing process  Die area determined by architecture and circuit design 10

SPEC CPU Benchmark  Programs used to measure performance  Supposedly typical of actual workload  Standard Performance Evaluation Cooperative (SPEC)  Develops benchmarks for CPU, I/O, Web, …  SPEC CPU2006  Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance  Normalize relative to reference machine  Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point) 11

CINT2006 for Opteron X NameDescriptionIC×10 9 CPITc (ns)Exec timeRef timeSPECratio perlInterpreted string processing2, , bzip2Block-sorting compression2, , gccGNU C Compiler1, , mcfCombinatorial optimization ,3459, goGo game (AI)1, , hmmerSearch gene sequence2, , sjengChess game (AI)2, , libquantumQuantum computer simulation1, ,04720, h264avcVideo compression3, , omnetppDiscrete event simulation , astarGames/path finding1, , xalancbmkXML parsing1, ,1436, Geometric mean

SPEC Power Benchmark  Power consumption of server at different workload levels  Performance: ssj_ops/sec  Power: Watts (Joules/sec) 13

SPECpower_ssj2008 for X4 Target Load %Performance (ssj_ops/sec)Average Power (Watts) 100%231, %211, %185, %163, %140, %118, %920, %70, %47, %23, %0141 Overall sum1,283,5902,605 ∑ssj_ops/ ∑power493 14

Pitfall: Amdahl’s Law  Improving an aspect of a computer and expecting a proportional improvement in overall performance §1.8 Fallacies and Pitfalls Can’t be done! Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast 15

Fallacy: Low Power at Idle  Look back at X4 power benchmark  At 100% load: 295W  At 50% load: 246W (83%)  At 10% load: 180W (61%)  Google data center  Mostly operates at 10% – 50% load  At 100% load less than 1% of the time  Consider designing processors to make power proportional to load 16

Pitfall: MIPS as a Performance Metric  MIPS: Millions of Instructions Per Second  Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions CPI varies between programs on a given CPU 17

Concluding Remarks  Cost/performance is improving  Due to underlying technology development  Hierarchical layers of abstraction  In both hardware and software  Instruction set architecture  The hardware/software interface  Execution time: the best performance measure  Power is a limiting factor  Use parallelism to improve performance §1.9 Concluding Remarks 18

Summary  Performance Definition  Power Trend  Amdahl’s Law 19

What I want you to do  Review Chapter 1  Work on your assignment 1 20