1. CS 35101 Computer Architecture Fall 2009 Lecture 01: Introduction Dr. Angela Guercio (www.personal.kent.edu/~aguercio)www.personal.kent.edu/~aguercio Course Web Page http://www.personal.kent.edu/~aguercio/Fall09/ CS35101-600Fa09.html

2. Course Administration Instructor:Dr. Angela Guercio aguercio@kent.edu 424 Main Hall aguercio@kent.edu Office Hrs: TR 10:00am - 10:55am 12:25pm - 1:55pm 4:55pm - 5:25pm other times are available by appointment URL: http://www.personal.kent.edu/~aguercio/Fall09/CS35101- 600Fa09.htmlhttp://www.personal.kent.edu/~aguercio/Fall09/CS35101- 600Fa09.html Text (Required): D. Patterson, J.Hennessy - Computer Organization and Design, 4 th Edition, Morgan Kaufmann, 2009 Slides:pdf on Flashline under My Courses

3. The Syllabus: Requirements Class attendance is required. If you miss a class, let me know ahead of time You cannot miss more than 4 classes without documentation For >4 you must provide the documented reason. You are responsible for bringing yourself up-to-date on class material and assignments Penalty: drop of the grade (ex from A to B, from B to C, ect.) Reading material before class is required Read material once before class and again after class

4. Course Content The course provides a functional overview of: computer systems, interconnection of basic components, system performance measures, instruction set design, arithmetic logic unit control unit, memory system, pipelining, interrupts input-output. structures from an object oriented perspective. Content

5. Course Goals To learn the organizational paradigms that determine the capabilities and performance of computer systems. To understand the interactions between the computer’s architecture and its software future software designers (compiler writers, operating system designers, database programmers, …) can achieve the best cost-performance trade-offs future architects understand the effects of their design choices on software applications. Goals CS22021 CS I Course prerequisites

6. The Exams 2 Mid Term Exams and 1 Final Exam 100 points each No Make-up exams Except in extreme case and only if I have been notified prior the exam has been issued Homework and Projects must be returned by the deadline Late penalty: 3 points per day

7. The Grade Participation 5% Attendance5% Homework and Projects40% Exam 1 and 230% Final Exam 20% Check the syllabus for the grading scale

8. Dates to Remember Last day to withdraw before grade W is assigned, is Sept.13, 2009 Last day to drop the class is Nov. 8, 2009 Exam 1 is Thursday, Oct 1 Exam 2 is Thursday, Nov 10 Final Exam is Tuesday, Dec. 15 (1:00 pm – 3:00pm) Thanksgiving Recess: Nov. 25 – Nov. 29 Classes End: Dec. 15, 2009

9. Others: more on the syllabus Read the syllabus for: Course Withdrawal Academic Honesty Policy Students with Disabilities Classes Canceled – Campus Closings Conduct And other important issues

10. Others: Security Emergency: In case of an emergency please contact the security on campus. Security phone on campus: #53123 Security cell phone (330) 705-0430 or, of course, 911. I recommend that you program into your cell phone the previous numbers.

11. Course Structure Various homework assignments throughout the semester Some projects. Design focused class 3 weeks learn the MIPS ISA and basic architecture 2 weeks pipelined datapath design issues 3 weeks superscalar/VLSI datapath design issues 2 week memory hierarchies and memory design issues 1 weeks I/O design issues 3 weeks review and practice 1 week exams Lectures:

12. Questions you will be able to answer by the end of the course…. How are programs written in high level language execute on the HW? What is the interface between SW and HW? How does SW instruct the HW? What determine the performance of a program? How can a programmer improve the performance What technique can be use by HW to improve the performance?

13. How Do the Pieces Fit Together? I/O systemInstr. Set Proc. Compiler Operating System Application Digital Design Circuit Design Instruction Set Architecture Firmware Coordination of many levels of abstraction Under a rapidly changing set of forces Design, measurement, and evaluation Datapath & Control Memory system CS 33211

14. Chapter 1 Computer Abstractions and Technology

15. Chapter 1 — Computer Abstractions and Technology — 15 The Computer Revolution Progress in computer technology Underpinned by Moore’s Law Makes novel applications feasible Computers in automobiles Cell phones Human genome project World Wide Web Search Engines Computers are pervasive §1.1 Introduction

16. Chapter 1 — Computer Abstractions and Technology — 16 Classes of Computers Desktop computers General purpose, variety of software Subject to cost/performance tradeoff Server computers Network based High capacity, performance, reliability Range from small servers to building sized Embedded computers Hidden as components of systems Stringent power/performance/cost constraints

17. Chapter 1 — Computer Abstractions and Technology — 17 The Processor Market

18. Chapter 1 — Computer Abstractions and Technology — 18 What You Will Learn How programs are translated into the machine language And how the hardware executes them The hardware/software interface What determines program performance And how it can be improved How hardware designers improve performance What is parallel processing

19. Chapter 1 — Computer Abstractions and Technology — 19 Understanding Performance Algorithm Determines number of operations executed Programming language, compiler, architecture Determine number of machine instructions executed per operation Processor and memory system Determine how fast instructions are executed I/O system (including OS) Determines how fast I/O operations are executed

20. Chapter 1 — Computer Abstractions and Technology — 20 Below Your Program Application software Written in high-level language System software Compiler: translates HLL code to machine code Operating System: service code Handling input/output Managing memory and storage Scheduling tasks & sharing resources Hardware Processor, memory, I/O controllers §1.2 Below Your Program

21. Chapter 1 — Computer Abstractions and Technology — 21 Levels of Program Code High-level language Level of abstraction closer to problem domain Provides for productivity and portability Assembly language Textual representation of instructions Hardware representation Binary digits (bits) Encoded instructions and data

22. Chapter 1 — Computer Abstractions and Technology — 22 Components of a Computer Same components for all kinds of computer Desktop, server, embedded Input/output includes User-interface devices Display, keyboard, mouse Storage devices Hard disk, CD/DVD, flash Network adapters For communicating with other computers §1.3 Under the Covers The BIG Picture

23. Chapter 1 — Computer Abstractions and Technology — 23 Anatomy of a Computer Output device Input device Network cable

24. Chapter 1 — Computer Abstractions and Technology — 24 Anatomy of a Mouse Optical mouse LED illuminates desktop Small low-res camera Basic image processor Looks for x, y movement Buttons & wheel Supersedes roller-ball mechanical mouse

25. Chapter 1 — Computer Abstractions and Technology — 25 Through the Looking Glass LCD screen: picture elements (pixels) Mirrors content of frame buffer memory

26. Chapter 1 — Computer Abstractions and Technology — 26 Opening the Box

27. Chapter 1 — Computer Abstractions and Technology — 27 Inside the Processor (CPU) Datapath: performs operations on data Control: sequences datapath, memory,... Cache memory Small fast SRAM memory for immediate access to data

28. Chapter 1 — Computer Abstractions and Technology — 28 Inside the Processor AMD Barcelona: 4 processor cores

29. Chapter 1 — Computer Abstractions and Technology — 29 Abstractions Abstraction helps us deal with complexity Hide lower-level detail Instruction set architecture (ISA) The hardware/software interface Application binary interface The ISA plus system software interface Implementation The details underlying and interface The BIG Picture

30. Chapter 1 — Computer Abstractions and Technology — 30 A Safe Place for Data Volatile main memory Loses instructions and data when power off Non-volatile secondary memory Magnetic disk Flash memory Optical disk (CDROM, DVD)

31. Chapter 1 — Computer Abstractions and Technology — 31 Networks Communication and resource sharing Local area network (LAN): Ethernet Within a building Wide area network (WAN: the Internet Wireless network: WiFi, Bluetooth

32. Chapter 1 — Computer Abstractions and Technology — 32 Technology Trends Electronics technology continues to evolve Increased capacity and performance Reduced cost YearTechnologyRelative performance/cost 1951Vacuum tube1 1965Transistor35 1975Integrated circuit (IC)900 1995Very large scale IC (VLSI)2,400,000 2005Ultra large scale IC6,200,000,000 DRAM capacity

33. Chapter 1 — Computer Abstractions and Technology — 33 Defining Performance Which airplane has the best performance? §1.4 Performance

34. Chapter 1 — Computer Abstractions and Technology — 34 Response Time and Throughput Response time How long it takes to do a task Throughput Total work done per unit time e.g., tasks/transactions/… per hour How are response time and throughput affected by Replacing the processor with a faster version? Adding more processors? We’ll focus on response time for now…

35. Chapter 1 — Computer Abstractions and Technology — 35 Relative Performance Define Performance = 1/Execution Time “X is n time faster than Y” Example: time taken to run a program 10s on A, 15s on B Execution Time B / Execution Time A = 15s / 10s = 1.5 So A is 1.5 times faster than B

36. Chapter 1 — Computer Abstractions and Technology — 36 Measuring Execution Time Elapsed time Total response time, including all aspects Processing, I/O, OS overhead, idle time Determines system performance CPU time Time spent processing a given job Discounts I/O time, other jobs’ shares Comprises user CPU time and system CPU time Different programs are affected differently by CPU and system performance

37. Chapter 1 — Computer Abstractions and Technology — 37 CPU Clocking Operation of digital hardware governed by a constant-rate clock Clock (cycles) Data transfer and computation Update state Clock period Clock period: duration of a clock cycle e.g., 250ps = 0.25ns = 250×10 –12 s Clock frequency (rate): cycles per second e.g., 4.0GHz = 4000MHz = 4.0×10 9 Hz

38. Chapter 1 — Computer Abstractions and Technology — 38 CPU Time Performance improved by Reducing number of clock cycles Increasing clock rate Hardware designer must often trade off clock rate against cycle count

39. Chapter 1 — Computer Abstractions and Technology — 39 CPU Time Example Computer A: 2GHz clock, 10s CPU time Designing Computer B Aim for 6s CPU time Can do faster clock, but causes 1.2 × clock cycles How fast must Computer B clock be?

40. Chapter 1 — Computer Abstractions and Technology — 40 Instruction Count and CPI Instruction Count for a program Determined by program, ISA and compiler Average cycles per instruction Determined by CPU hardware If different instructions have different CPI Average CPI affected by instruction mix

41. Chapter 1 — Computer Abstractions and Technology — 41 CPI Example Computer A: Cycle Time = 250ps, CPI = 2.0 Computer B: Cycle Time = 500ps, CPI = 1.2 Same ISA Which is faster, and by how much? A is faster… …by this much

42. Chapter 1 — Computer Abstractions and Technology — 42 CPI in More Detail If different instruction classes take different numbers of cycles Weighted average CPI Relative frequency

43. Chapter 1 — Computer Abstractions and Technology — 43 CPI Example Alternative compiled code sequences using instructions in classes A, B, C ClassABC CPI for class123 IC in sequence 1212 IC in sequence 2411 Sequence 1: IC = 5 Clock Cycles = 2×1 + 1×2 + 2×3 = 10 Avg. CPI = 10/5 = 2.0 Sequence 2: IC = 6 Clock Cycles = 4×1 + 1×2 + 1×3 = 9 Avg. CPI = 9/6 = 1.5

44. Chapter 1 — Computer Abstractions and Technology — 44 Performance Summary Performance depends on Algorithm: affects IC, possibly CPI Programming language: affects IC, CPI Compiler: affects IC, CPI Instruction set architecture: affects IC, CPI, T c The BIG Picture

45. Chapter 1 — Computer Abstractions and Technology — 45 Power Trends In CMOS IC technology §1.5 The Power Wall ×1000 ×30 5V → 1V

46. Chapter 1 — Computer Abstractions and Technology — 46 Reducing Power Suppose a new CPU has 85% of capacitive load of old CPU 15% voltage and 15% frequency reduction The power wall We can’t reduce voltage further We can’t remove more heat How else can we improve performance?

47. Chapter 1 — Computer Abstractions and Technology — 47 Uniprocessor Performance §1.6 The Sea Change: The Switch to Multiprocessors Constrained by power, instruction-level parallelism, memory latency

48. Chapter 1 — Computer Abstractions and Technology — 48 Multiprocessors Multicore microprocessors More than one processor per chip Requires explicitly parallel programming Compare with instruction level parallelism Hardware executes multiple instructions at once Hidden from the programmer Hard to do Programming for performance Load balancing Optimizing communication and synchronization

49. Chapter 1 — Computer Abstractions and Technology — 49 Manufacturing ICs Yield: proportion of working dies per wafer §1.7 Real Stuff: The AMD Opteron X4

50. Chapter 1 — Computer Abstractions and Technology — 50 AMD Opteron X2 Wafer X2: 300mm wafer, 117 chips, 90nm technology X4: 45nm technology

51. Chapter 1 — Computer Abstractions and Technology — 51 Integrated Circuit Cost Nonlinear relation to area and defect rate Wafer cost and area are fixed Defect rate determined by manufacturing process Die area determined by architecture and circuit design

52. Chapter 1 — Computer Abstractions and Technology — 52 SPEC CPU Benchmark Programs used to measure performance Supposedly typical of actual workload Standard Performance Evaluation Corp (SPEC) Develops benchmarks for CPU, I/O, Web, … SPEC CPU2006 Elapsed time to execute a selection of programs Negligible I/O, so focuses on CPU performance Normalize relative to reference machine Summarize as geometric mean of performance ratios CINT2006 (integer) and CFP2006 (floating-point)

53. Chapter 1 — Computer Abstractions and Technology — 53 CINT2006 for Opteron X4 2356 NameDescriptionIC×10 9 CPITc (ns)Exec timeRef timeSPECratio perlInterpreted string processing2,1180.750.406379,77715.3 bzip2Block-sorting compression2,3890.850.408179,65011.8 gccGNU C Compiler1,0501.720.47248,05011.1 mcfCombinatorial optimization33610.000.401,3459,1206.8 goGo game (AI)1,6581.090.4072110,49014.6 hmmerSearch gene sequence2,7830.800.408909,33010.5 sjengChess game (AI)2,1760.960.483712,10014.5 libquantumQuantum computer simulation1,6231.610.401,04720,72019.8 h264avcVideo compression3,1020.800.4099322,13022.3 omnetppDiscrete event simulation5872.940.406906,2509.1 astarGames/path finding1,0821.790.407737,0209.1 xalancbmkXML parsing1,0582.700.401,1436,9006.0 Geometric mean11.7 High cache miss rates

54. Chapter 1 — Computer Abstractions and Technology — 54 SPEC Power Benchmark Power consumption of server at different workload levels Performance: ssj_ops/sec Power: Watts (Joules/sec)

55. Chapter 1 — Computer Abstractions and Technology — 55 SPECpower_ssj2008 for X4 Target Load %Performance (ssj_ops/sec)Average Power (Watts) 100%231,867295 90%211,282286 80%185,803275 70%163,427265 60%140,160256 50%118,324246 40%920,35233 30%70,500222 20%47,126206 10%23,066180 0%0141 Overall sum1,283,5902,605 ∑ssj_ops/ ∑power493

56. Chapter 1 — Computer Abstractions and Technology — 56 Pitfall: Amdahl’s Law Improving an aspect of a computer and expecting a proportional improvement in overall performance §1.8 Fallacies and Pitfalls Can’t be done! Example: multiply accounts for 80s/100s How much improvement in multiply performance to get 5× overall? Corollary: make the common case fast

57. Chapter 1 — Computer Abstractions and Technology — 57 Fallacy: Low Power at Idle Look back at X4 power benchmark At 100% load: 295W At 50% load: 246W (83%) At 10% load: 180W (61%) Google data center Mostly operates at 10% – 50% load At 100% load less than 1% of the time Consider designing processors to make power proportional to load

58. Chapter 1 — Computer Abstractions and Technology — 58 Pitfall: MIPS as a Performance Metric MIPS: Millions of Instructions Per Second Doesn’t account for Differences in ISAs between computers Differences in complexity between instructions CPI varies between programs on a given CPU

59. Chapter 1 — Computer Abstractions and Technology — 59 Concluding Remarks Cost/performance is improving Due to underlying technology development Hierarchical layers of abstraction In both hardware and software Instruction set architecture The hardware/software interface Execution time: the best performance measure Power is a limiting factor Use parallelism to improve performance §1.9 Concluding Remarks