PS/2 Mouse/Keyboard Port

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Presentation transcript:

PS/2 Mouse/Keyboard Port The Spartan®-3E FPGA Starter Kit board

PS/2 Keyboard Port The PS2 port was introduced in IBM's Personal System/2 personnel computers. PS2 port contains two wires for communication purposes. One wire is for data, which is transmitted in a serial stream. The other wire is for the clock information, which specifies when the data is valid and can be retrieved. The information is transmitted as an 11-bit "packet" that contains a start bit, 8 data bits, an odd parity bit, and a stop bit. The FPGA prototyping board has a PS2 port and acts as a host.

Timing diagram of a PS2 port. Keyboard Transmission of a Scan Code.

System Transmission of a Command to PS/2 Device. In addition to data and clock lines, the PS2 port includes connections for power (Vdd) and ground. The power is supplied by the host. In the original PS2 port, Vcc is 5 V. Most current keyboards and mice can work well with 3.3 V.

Device-to-host communication protocol A PS2 device and its host communicate via packets. The data is transmitted in a serial stream. Transmission begins with a start bit, followed by 8 data bits and an odd parity bit, and ends with a stop bit. The clock information is carried in a separate clock signal. The falling edge of the clk signal indicates that the corresponding bit in the data line is valid and can be retrieved. The clock period of the clk signal is between 60 and 100 micro seconds (i.e., 10 kHz to 16.7 kHz), and the data signal is stable at least 5 micro seconds before and after the falling edge of the clk signal.

PS2 KEYBOARD SCAN CODE A keyboard consists of a matrix of keys and an embedded microcontroller that monitors (i.e., scans) the activities of the keys and sends scan code accordingly. Three types of key activities are observed: When a key is pressed, the make code of the key is transmitted. When a key is held down continuously, a condition known as typematic, the make code is transmitted repeatedly at a specific rate. By default, a PS2 keyboard transmits the make code about every 100 ms after a key has been held down for 0.5 second. When a key is released, the break code of the key is transmitted. The make code is normally 1 byte wide and represented by two hexadecimal numbers. For example, the make code of the A key is 1C. This code can be conveyed by one packet when transmitted. The make codes of a handful of special-purpose keys, which are known as the extended keys, can have 2 to 4 bytes. For example, the make code of the upper arrow on the right is EO 75. Multiple packets are needed for the transmission. The break codes of the regular keys consist of FO followed by the make code of the key. For example, the break code of the A key is FO 1C. The PS2 keyboard transmits a sequence of codes according to the key activities. For example, when we press and release the A key, the keyboard first transmits its make code and then the break code: 1C FO 1C

Scan code of the PS2 keyboard If we hold the key down for a while before releasing it, the make code will be transmitted multiple times: 1C 1C 1C 1C …… 1C FO 1C. Multiple keys can be pressed at the same time. For example, we can first press the shift key (whose make code is 12) and then the A key, and release the A key and then release the shift key. The transmitted code sequence follows the make and break codes of the two keys: 12 1C FO 1C FO 12.

Scan Codes for PS/2 Keyboard If the default scan code is used, no commands will need to be sent to the keyboard.

The PS/2 Serial Data Transmission Protocol The scan codes are sent serially using 11 bits on the bi-directional data line. When neither the keyboard nor the computer needs to send data, the data line and the clock line are High (inactive). The transmission of a single key or command consists of the following components: A start bit ('0') 8 data bits containing the key scan code in low to high bit order Odd parity bit such that the eight data bits plus the parity bit are an odd number of ones A stop bit ('1')

The PS/2 Serial Data Transmission Protocol When implementing the interface code, it will be necessary to filter the slow keyboard clock to ensure reliable operation with the fast logic inside the FPGA chip. Whenever an electrical pulse is transmitted on a wire, electromagnetic properties of the wire cause the pulse to be distorted and some portions of the pulse may be reflected from the end of the wire. One approach that solves the reflected pulse problem is to feed the PS/2 clock signal into an 8-bit shift register This prevents noise and ringing on the clock line from causing occasional extra clocks during the serial-to-parallel conversion in the FPGA chip. A few keyboards and mice will work without the clock filter and many will not. They all will work with the clock filter, and it is relatively easy to implement.

The PS/2 Serial Data Transmission Protocol Upon completion of each command byte, the keyboard will send an acknowledge (ACK) signal, FA, if it received the data successfully. If the system does not release the data line, the keyboard will continue to generate the clock, and upon completion, it will send a ‘re-send command’ signal, FE or FC, to the system. A parity error or missing stop bit will also generate a re-send command signal.

The Spartan®-3E FPGA Starter Kit board Includes a PS/2 mouse/keyboard port and the standard 6- pin mini-DIN connector, labeled J14 on the board. Only pins 1 and 5 of the connector attach to the FPGA.

The Spartan®-3E FPGA Starter Kit board PS/2 Bus Timing Waveforms