L30 01May031 Semiconductor Device Modeling and Characterization EE5342, Lecture 30 Spring 2003 Professor Ronald L. Carter

L30 01May032 Gummel-Poon Static npn Circuit Model C E B B’ I LC I LE I BF I BR I CC - I EC = {IS/Q B }* {exp(v BE /NFV t )- exp(v BC /NRV t )} RCRC RERE R BB Intrinsic Transistor

L30 01May033 Gummel Poon npn Model Equations I BF = IS expf(v BE /NFV t )/BF I LE = ISE expf(v BE /NEV t ) I BR = IS expf(v BC /NRV t )/BR I LC = ISC expf(v BC /NCV t ) I CC - I EC = IS(exp(v BE /NFV t - exp(v BC /NRV t )/Q B Q B = {  +   + (BF IBF/IKF + BR IBR/IKR)  1/2  }  (1 - v BC /VAF - v BE /VAR ) -1

L30 01May034 VBIC Model Overview [5] Self-heating effects included Improved Early effect modeling Quasi-saturation modeling Parasitic substrate transistor modeling Parasitic fixed (oxide) capacitance modeling An avalanche multiplication model included Base current is decoupled from collector current

L30 01May035 CAD Tools Support for VBIC Hspice [4] Does not support PNP device Does not scale with “Area” and “M” terms Spectre [5] Support both NPN and PNP devices scale with “Area” and “M” term HPADS No temperature nodes (“dt” and “tl”), so unable to simulate thermal coupling effects

L30 01May036 Temperature Designations for VBIC 25tnom27tnomParameters measurement temperature 27tref 25 0 Default 27 0 Default Name temp Ambient temp. dtemptriseTemperature rise of the device from ambient Hspice [5] Spectre [4] Parameters Description

L30 01May037 Using VBIC in Spectre [5] Name c b e [s] [dt] [tl] ModelName parameter=value... Selft=1 and Rth>0 to enable Self-heating 1 volt at the temperature nodes = 1 degree in temperature “ tl ” node represents the initial local temperature of device which always corresponds to trise+temp “ dt ” node represents the rise above trise+temp caused by thermal dissipation, whose value equals V(dt)-V(tl) Device temperature=V(dt)-V(tl)+trise+temp

L30 01May038 Using VBIC in Cadence Need explicit external temperature nodes in the symbol to model inter-device thermal coupling by Connecting thermal network between “dt” nodes, or Adding VCVS between “tl” and “tlr” node Customized VBIC 6-terminal (5-pin) symbol

L30 01May039 Model Conversion Most BJTs are defined with SGP model A conversion from SGP to VBIC is needed Only approximate conversion is possible Some parameters are left unmapped such as R th and C th Two approaches are provided Manual conversion — done empirically and need Local Ratio Evaluation [2] Program conversion — “official” program sgp_2_vbic [3]

L30 01May0310 Parameters Mapping by sgp_2_vbic VBICmappingVBICmappingVBICmapping RcxRcMcMjcXtf Rci0CjcpCjsVtf RbxRbmPsVjsItf RbiRb-RbmMsMjsTr Re NeiNfTd  Tf·Ptf/180 Is IbenIseEaEg Nf NenNeEaieEg Nr IbeiIs/BfEaicEg Fc IbciIs/BrEaneEg Cje NciNrEancEg PeVjeIbcnIscXisXti MeMjeNcnNcXiiXti-Xtb CjcCjc·XcjcIkf XinXti-Xtb CjepCjc(1-Xcjc)Ikr KfnKf PcVjcTf AfnAf Early Effect model is different Need Vbe, Vbc to solve the 3 equations below

L30 01May0311

L30 01May0312 Heterojunction Electrostatics EoEo E C,p E V,p E F,p E F,n E C,n E V,n ECEC EVEV qpqp qnqn -x n xpxp 0

L30 01May0313 Poisson’s Equation ExEx x xpxp -x n

L30 01May0314 Heterojunction electronics

L30 01May0315 Heterojunction electronics (cont)

L30 01May0316 Heterojunction electronics (cont)

L30 01May0317 Heterojunction depletion widths

L30 01May0318 Final Exam Review a paper on “Device Parameter Extraction”. Paper to be reviewed will be posted Monday, May 5, 2003 Comment on Device Physics used. Critique the extraction procedures –Assumptions –Consistency of method w.r.t. assumptions One page solution due 11 AM, Thur., May 8

L30 01May0319 References Fujiang Lin, et al, “Extraction Of VBIC Model for SiGe HBTs Made Easy by Going Through Gummel-Poon Model”, from n.pdf Avanti Star-spice User Manual, 04, Affirma Spectre Circuit Simulator Device Model Equations Zweidinger, D.T.; Fox, R.M., et al, “ Equivalent circuit modeling of static substrate thermal coupling using VCVS representation ”, Solid-State Circuits, IEEE Journal of, Volume: 2 Issue: 9, Sept. 2002, Page(s):