Pipeline Data Hazards: Detection and Circumvention Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005, and from slides kindly.

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Presentation transcript:

Pipeline Data Hazards: Detection and Circumvention Adapted from Computer Organization and Design, Patterson & Hennessy, © 2005, and from slides kindly made available by Dr Mary Jane Irwin, Penn State University. CS.210 Computer Systems and Architecture and CS.305 Computer Architecture

Pipeline Data Hazards: Detection and Circumvention Review: MIPS Pipeline Data and Control Paths Read Address Instruction Memory Add PC 4 Write Data Read Addr 1 Read Addr 2 Write Addr Register File Read Data 1 Read Data ALU Shift left 2 Add Data Memory Address Write Data Read Data IF/ID Sign Extend ID/EX EX/MEM MEM/WB Control ALU cntrl RegWrite MemWriteMemRead MemtoReg RegDst ALUOp ALUSrc Branch PCSrc CS210_305_08/2

Pipeline Data Hazards: Detection and Circumvention Control Settings EX StageMEM StageWB Stage Reg Dst ALU Op1 ALU Op0 ALU Src BrchMem Read Mem Write Reg Write Mem toReg R lw sw X X beq X X CS210_305_08/3

Pipeline Data Hazards: Detection and Circumvention stall Review: One Way to “Fix” a Data Hazard I n s t r. O r d e r add $1, ALU IM Reg DMReg sub $4,$1,$5 and $6,$7,$1 ALU IM Reg DMReg ALU IM Reg DMReg Fix data hazard by waiting – stall – but impacts CPI CS210_305_08/4

Pipeline Data Hazards: Detection and Circumvention Review: Another Way to “Fix” a Data Hazard I n s t r. O r d e r add $1, ALU IM Reg DMReg sub $4,$1,$5 and $6,$7,$1 ALU IM Reg DMReg ALU IM Reg DMReg Fix data hazards by forwarding results as soon as they are available to where they are needed sw $4,4($1) or $8,$1,$1 ALU IM Reg DMReg ALU IM Reg DMReg CS210_305_08/5

Pipeline Data Hazards: Detection and Circumvention Data Forwarding (aka Bypassing)  Take the result from the earliest point that it exists in any of the pipeline state registers and forward it to the functional units (e.g., the ALU) that need it that cycle  For ALU functional unit: the inputs can come from any pipeline register rather than just from ID/EX by l adding multiplexors to the inputs of the ALU l connecting the Rd write data in EX/MEM or MEM/WB to either (or both) of the EX’s stage Rs and Rt ALU mux inputs l adding the proper control hardware to control the new muxes  Other functional units may need similar forwarding logic (e.g., the DM)  With forwarding can achieve a CPI of 1 even in the presence of data dependencies CS210_305_08/6

Pipeline Data Hazards: Detection and Circumvention Data Forwarding Control Conditions EX/MEM hazard: if (EX/MEM.RegWrite and (EX/MEM.RegisterRd != 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRs)) ForwardA = 10 if (EX/MEM.RegWrite and (EX/MEM.RegisterRd != 0) and (EX/MEM.RegisterRd = ID/EX.RegisterRt)) ForwardB = 10 Forwards the result from the previous instr. to either input of the ALU Forwards the result from the second previous instr. to either input of the ALU MEM/WB hazard: if (MEM/WB.RegWrite and (MEM/WB.RegisterRd != 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) ForwardA = 01 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd != 0) and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) ForwardB = 01 CS210_305_08/7

Pipeline Data Hazards: Detection and Circumvention Forwarding Illustration I n s t r. O r d e r add $1, sub $4,$1,$5 and $6,$7,$1 ALU IM Reg DMReg ALU IM Reg DMReg ALU IM Reg DMReg EX/MEM hazard forwarding MEM/WB hazard forwarding CS210_305_08/8

Pipeline Data Hazards: Detection and Circumvention Yet Another Complication! I n s t r. O r d e r add $1,$1,$2 ALU IM Reg DMReg add $1,$1,$3 add $1,$1,$4 ALU IM Reg DMReg ALU IM Reg DMReg  Another potential data hazard can occur when there is a conflict between the result of the WB stage instruction and the MEM stage instruction – which should be forwarded? CS210_305_08/9

Pipeline Data Hazards: Detection and Circumvention Yet Another Complication! I n s t r. O r d e r add $1,$1,$2 ALU IM Reg DMReg add $1,$1,$3 add $1,$1,$4 ALU IM Reg DMReg ALU IM Reg DMReg  Another potential data hazard can occur when there is a conflict between the result of the WB stage instruction and the MEM stage instruction – which should be forwarded? CS210_305_08/10

Pipeline Data Hazards: Detection and Circumvention Corrected Data Forwarding Control Conditions MEM/WB hazard: if (MEM/WB.RegWrite and (MEM/WB.RegisterRd != 0) and (EX/MEM.RegisterRd != ID/EX.RegisterRs) and (MEM/WB.RegisterRd = ID/EX.RegisterRs)) ForwardA = 01 if (MEM/WB.RegWrite and (MEM/WB.RegisterRd != 0) and (EX/MEM.RegisterRd != ID/EX.RegisterRt) and (MEM/WB.RegisterRd = ID/EX.RegisterRt)) ForwardB = 01 CS210_305_08/11

Pipeline Data Hazards: Detection and Circumvention Datapath with Forwarding Hardware PCSrc Read Address Instruction Memory Add PC 4 Write Data Read Addr 1 Read Addr 2 Write Addr Register File Read Data 1 Read Data ALU Shift left 2 Add Data Memory Address Write Data Read Data IF/ID Sign Extend ID/EX EX/MEM MEM/WB Control ALU cntrl Branch Forward Unit CS210_305_08/12

Pipeline Data Hazards: Detection and Circumvention Datapath with Forwarding Hardware PCSrc ID/EX.RegisterRt ID/EX.RegisterRs EX/MEM.RegisterRd MEM/WB.RegisterRd CS210_305_08/13

Pipeline Data Hazards: Detection and Circumvention Memory-to-Memory Copies I n s t r. O r d e r lw $1,4($2) ALU IM Reg DMReg sw $1,4($3) ALU IM Reg DMReg  For loads immediately followed by stores (memory-to- memory copies) can avoid a stall by adding forwarding hardware from the MEM/WB register to the data memory input. l Would need to add a Forward Unit and a mux to the memory access stage CS210_305_08/14

Pipeline Data Hazards: Detection and Circumvention Forwarding with Load-use Data Hazards I n s t r. O r d e r lw $1,4($2) and $6,$1,$7 xor $4,$1,$5 or $8,$1,$9 ALU IM Reg DMReg ALU IM Reg DM ALU IM Reg DMReg ALU IM Reg DMReg ALU IM Reg DMReg ALU IM Reg DMReg sub $4,$1,$5 CS210_305_08/15

Pipeline Data Hazards: Detection and Circumvention stall Forwarding with Load-use Data Hazards I n s t r. O r d e r lw $1,4($2) ALU IM Reg DMReg ALU IM Reg DM ALU IM Reg DMReg ALU IM Reg DMReg ALU IM Reg DMReg ALU IM Reg DMReg sub $4,$1,$5 and $6,$1,$7 xor $4,$1,$5 or $8,$1,$9 CS210_305_08/16

Pipeline Data Hazards: Detection and Circumvention Load-use Hazard Detection Unit  Need a Hazard detection Unit in the ID stage that inserts a stall between the load and its use ID Hazard Detection: if (ID/EX.MemRead and ((ID/EX.RegisterRt = IF/ID.RegisterRs) or (ID/EX.RegisterRt = IF/ID.RegisterRt))) stall the pipeline  The first line tests to see if the instruction now in the EX stage is a lw ; the next two lines check to see if the destination register of the lw matches either source register of the instruction in the ID stage (the load-use instruction)  After this one cycle stall, the forwarding logic can handle the remaining data hazards CS210_305_08/17

Pipeline Data Hazards: Detection and Circumvention Stall Hardware  Along with the Hazard Unit, we have to implement the stall  Prevent the instructions in the IF and ID stages from progressing down the pipeline – done by preventing the PC register and the IF/ID pipeline register from changing Hazard detection Unit controls the writing of the PC ( PC.write ) and IF/ID ( IF/ID.write ) registers  Insert a “bubble” between the lw instruction (in the EX stage) and the load-use instruction (in the ID stage) (i.e., insert a noop in the execution stream) Set the control bits in the EX, MEM, and WB control fields of the ID/EX pipeline register to 0 ( noop ). The Hazard Unit controls the mux that chooses between the real control values and the 0’s.  Let the lw instruction and the instructions after it in the pipeline (before it in the code) proceed normally down the pipeline CS210_305_08/18

Pipeline Data Hazards: Detection and Circumvention Adding the Hazard Hardware Read Address Instruction Memory Add PC 4 Write Data Read Addr 1 Read Addr 2 Write Addr Register File Read Data 1 Read Data ALU Shift left 2 Add Data Memory Address Write Data Read Data IF/ID Sign Extend ID/EX EX/MEM MEM/WB Control ALU cntrl Branch PCSrc Forward Unit Hazard Unit 0 1 CS210_305_08/19

Pipeline Data Hazards: Detection and Circumvention Adding the Hazard Hardware Read Address Instruction Memory Add PC 4 Write Data Read Addr 1 Read Addr 2 Write Addr Register File Read Data 1 Read Data ALU Shift left 2 Add Data Memory Address Write Data Read Data IF/ID Sign Extend ID/EX EX/MEM MEM/WB Control ALU cntrl Branch PCSrc Forward Unit Hazard Unit 0 1 ID/EX.RegisterRt 0 ID/EX.MemRead CS210_305_08/20