Configurable, reconfigurable, and run-time reconfigurable computing.

Slides:



Advertisements
Similar presentations
© 2004 Wayne Wolf Topics Task-level partitioning. Hardware/software partitioning.  Bus-based systems.
Advertisements

ECOE 560 Design Methodologies and Tools for Software/Hardware Systems Spring 2004 Serdar Taşıran.
TIE Extensions for Cryptographic Acceleration Charles-Henri Gros Alan Keefer Ankur Singla.
Chapter 1 An Overview of Computers and Programming Languages.
LOGO HW/SW Co-Verification -- Mentor Graphics® Seamless CVE By: Getao Liang March, 2006.
Extensible Processors. 2 ASIP Gain performance by:  Specialized hardware for the whole application (ASIC). −  Almost no flexibility. −High cost.  Use.
Chapter 1: An Overview of Computers and Programming Languages J ava P rogramming: From Problem Analysis to Program Design, From Problem Analysis to Program.
1 HW/SW Partitioning Embedded Systems Design. 2 Hardware/Software Codesign “Exploration of the system design space formed by combinations of hardware.
Behavioral Design Outline –Design Specification –Behavioral Design –Behavioral Specification –Hardware Description Languages –Behavioral Simulation –Behavioral.
Tejas Bhatt and Dennis McCain Hardware Prototype Group, NRC/Dallas Matlab as a Development Environment for FPGA Design Tejas Bhatt June 16, 2005.
Trend towards Embedded Multiprocessors Popular Examples –Network processors (Intel, Motorola, etc.) –Graphics (NVIDIA) –Gaming (IBM, Sony, and Toshiba)
C++ Programming: From Problem Analysis to Program Design, Third Edition Chapter 1: An Overview of Computers and Programming Languages C++ Programming:
HW/SW Co-Synthesis of Dynamically Reconfigurable Embedded Systems HW/SW Partitioning and Scheduling Algorithms.
SSS 4/9/99CMU Reconfigurable Computing1 The CMU Reconfigurable Computing Project April 9, 1999 Mihai Budiu
SM3121 Software Technology Mark Green School of Creative Media.
Router modeling using Ptolemy Xuanming Dong and Amit Mahajan May 15, 2002 EE290N.
Implementation of DSP Algorithm on SoC. Characterization presentation Student : Einat Tevel Supervisor : Isaschar Walter Accompany engineer : Emilia Burlak.
Voicu Groza, 2008 SITE, HARDWARE/SOFTWARE CODESIGN OF EMBEDDED SYSTEMS 1 Hardware/Software Codesign of Embedded Systems DESIGN METHODOLOGIES Voicu.
1 3-General Purpose Processors: Altera Nios II 2 Altera Nios II processor A 32-bit soft core processor from Altera Comes in three cores: Fast, Standard,
Lecture 13 Introduction to Embedded Systems Graduate Computer Architecture Fall 2005 Shih-Hao Hung Dept. of Computer Science and Information Engineering.
Paper Review: XiSystem - A Reconfigurable Processor and System
Automated Design of Custom Architecture Tulika Mitra
Copyright © 2002 Qualis Design Corporation Industry and Textbook Overview Qualis Design Corporation PO Box 4444 Beaverton, Oregon USA Phone:
INTRODUCTION SOFTWARE HARDWARE DIFFERENCE BETWEEN THE S/W AND H/W.
High Performance Embedded Computing © 2007 Elsevier Lecture 3: Design Methodologies Embedded Computing Systems Mikko Lipasti, adapted from M. Schulte Based.
High Performance Embedded Computing © 2007 Elsevier Chapter 1, part 2: Embedded Computing High Performance Embedded Computing Wayne Wolf.
J. Christiansen, CERN - EP/MIC
1 Towards Optimal Custom Instruction Processors Wayne Luk Kubilay Atasu, Rob Dimond and Oskar Mencer Department of Computing Imperial College London HOT.
Hardware/Software Co-design Design of Hardware/Software Systems A Class Presentation for VLSI Course by : Akbar Sharifi Based on the work presented in.
ESL and High-level Design: Who Cares? Anmol Mathur CTO and co-founder, Calypto Design Systems.
© 2012 xtUML.org Bill Chown – Mentor Graphics Model Driven Engineering.
C++ Programming: From Problem Analysis to Program Design, Third Edition Chapter 1: An Overview of Computers and Programming Languages.
Hardware-software Interface Xiaofeng Fan
- 1 - EE898_HW/SW Partitioning Hardware/software partitioning  Functionality to be implemented in software or in hardware? No need to consider special.
Winter-Spring 2001Codesign of Embedded Systems1 Methodology for HW/SW Co-verification in SystemC Part of HW/SW Codesign of Embedded Systems Course (CE.
C OMPARING T HREE H EURISTIC S EARCH M ETHODS FOR F UNCTIONAL P ARTITIONING IN H ARDWARE -S OFTWARE C ODESIGN Theerayod Wiangtong, Peter Y. K. Cheung and.
System-level power analysis and estimation September 20, 2006 Chong-Min Kyung.
Workshop - November Toulouse Astrium Use Case.
Outline Announcements: –HW III due Friday! –HW II returned soon Software performance Architecture & performance Measuring performance.
SOC Virtual Prototyping: An Approach towards fast System- On-Chip Solution Date – 09 th April 2012 Mamta CHALANA Tech Leader ST Microelectronics Pvt. Ltd,
Chapter 1 Computers, Compilers, & Unix. Overview u Computer hardware u Unix u Computer Languages u Compilers.
1 Copyright  2001 Pao-Ann Hsiung SW HW Module Outline l Introduction l Unified HW/SW Representations l HW/SW Partitioning Techniques l Integrated HW/SW.
Chapter 1 : Overview of Computer and Programming By Suraya Alias
CSCI1600: Embedded and Real Time Software Lecture 33: Worst Case Execution Time Steven Reiss, Fall 2015.
Survey of multicore architectures Marko Bertogna Scuola Superiore S.Anna, ReTiS Lab, Pisa, Italy.
Pipelined and Parallel Computing Partition for 1 Hongtao Du AICIP Research Dec 1, 2005 Part 2.
Recen progress R93088 李清新. Recent status – about hardware design Finishing the EPXA10 JPEG2000 project. Due to the DPRAM problem can’t be solved by me,
Outline Announcements: –HW II Idue Friday! Validating Model Problem Software performance Measuring performance Improving performance.
1 of 14 Lab 2: Formal verification with UPPAAL. 2 of 14 2 The gossiping persons There are n persons. All have one secret to tell, which is not known to.
Chapter 1 An Overview of Computers and Programming Languages.
1 of 14 Lab 2: Design-Space Exploration with MPARM.
ECE 587 Hardware/Software Co- Design Lecture 23 LLVM and xPilot Professor Jia Wang Department of Electrical and Computer Engineering Illinois Institute.
Introduction to Performance Tuning Chia-heng Tu PAS Lab Summer Workshop 2009 June 30,
Embedded Systems. What is Embedded Systems?  Embedded reflects the facts that they are an integral.
Compilers: History and Context COMP Outline Compilers and languages Compilers and architectures – parallelism – memory hierarchies Other uses.
System-on-Chip Design
Programmable Hardware: Hardware or Software?
Dynamo: A Runtime Codesign Environment
Evaluating Register File Size
THE PROCESS OF EMBEDDED SYSTEM DEVELOPMENT
Chapter 1: An Overview of Computers and Programming Languages
Chapter 1: Introduction
C++ Programming: From Problem Analysis to Program Design
CSCI1600: Embedded and Real Time Software
Dynamically Reconfigurable Architectures: An Overview
Matlab as a Development Environment for FPGA Design
A High Performance SoC: PkunityTM
Introduction to Embedded Systems
CSCI1600: Embedded and Real Time Software
Research: Past, Present and Future
Presentation transcript:

Configurable, reconfigurable, and run-time reconfigurable computing

Outline 1.Introduction –Configurable –Reconfigurable –Run-time reconfigurable 2.Motivating example 3.Tools 4.Software compilers for configurable/reconfigurable systems 5.Multiprocessor complications Modular Design of Configurable Multiprocessor Systems

Introduction Modular Design of Configurable Multiprocessor Systems Which boxes should be chosen to maximize the amount of money while still keeping the overall weight under 15 kg? A multi dimensional problem could consider the density or dimensions of the boxes, the latter a typical packing problem.packing problem (The solution in this case is to choose all of the boxes besides the green one.) Example of a one-dimensional (constraint) knapsack problem:

Configuration Configurable solution: 1.Investigate the best set of boxes to take 2.Take them 3.No more thinking about boxes REconfigurable solution: 1.Investigate the best set of boxes to take 2.Take them for a long time 3.Stop what I’m doing and change everything in my backpack RUN TIME reconfigurable solution: 1.While walking, take the boxes I need and switch for the boxes I don’t need right now. This cost me some time to reconfigure the items in my backpack while walking. Modular Design of Configurable Multiprocessor Systems

Typical system design flow Power? Area? Speed? How can I quickly explore the design architecture and validate it early? Which CPU? Which device? Functionality? Cost? What are the partition trade off’s & how do I verify them? HWSW Spec Project Specification HDLs HW ready  C/ C++

Codesign environment Software-compiled system design flow Power? Area? Speed? Which CPU? Which device? Functionality? Cost? What are the partition trade off’s & how do I verify them? Project Specification Design & VerifySpecify & Verify DSM Spec HW Compile & Verify SystemC, Handel-CC/ C++SW PAL DSM How can I quickly explore the design architecture and validate it early?

What is the essential design question? MAIN QUESTION: How do we make practical systems (large) and meet time-to-market window (small)? ANSWER: Comprehensive co-design tools Modular Design of Configurable Multiprocessor Systems

Motivating Example

Congratulations! You are making a cellular phone. There are many design constraints: –Finite chip area –Finite power consumption –Finite memory (registers, cache, RAM, disk) –Real-time requirements for tasks There are many features: –Camera –Phonebook –Encryption/decryption –DSP –… Modular Design of Configurable Multiprocessor Systems

How do we do co-design for this project? We must make software and hardware for our beloved phone. Which software segments should be implemented in hardware? Do we add one more processor and bus connection, or dedicate that area to a custom instruction? We are OPTIMIZING This is decision problem is also known as the “Knapsack problem” and sometime the “assignment algorithm”, and computers can solve this faster than humans, given a complete and formal problem specification. Modular Design of Configurable Multiprocessor Systems

Tools

Real Configurable System Tools System level co-design from specification to direct implementation –Profiling –Partitioning & trade-off analysis –Co-verification & co-simulation –Higher-level language (HLL) synthesis direct to EDIF or RTL Software-compiled system design –Best time-to-market –Fastest simulation times … VERY FAST –HW/ SW partitioning solution –Seamless HW & SW verification –Reduces cost, risk & time of design –Best QoR & Quality of Design Celoxica

Real Configurable System Tools Modular Design of Configurable Multiprocessor Systems Dimond 2004

Real Configurable System Tools Modular Design of Configurable Multiprocessor Systems CoWare Processor Designer

Real Configurable System Tools Modular Design of Configurable Multiprocessor Systems Tensilica

Tradeoffs Modular Design of Configurable Multiprocessor Systems Tensilica

Tradeoffs Modular Design of Configurable Multiprocessor Systems

Configurable processors Modular Design of Configurable Multiprocessor Systems

Configurable processors Modular Design of Configurable Multiprocessor Systems From register file to configurable block

Configurable processors Modular Design of Configurable Multiprocessor Systems Stall for reconfiguration Or maybe stall during execution

Configurable processors Modular Design of Configurable Multiprocessor Systems Not realistic

Techniques Many techniques for finding what to implement as hardware: –Atasu et al. (DAC 03, CODES 05) –Biswas et al. (DATE 05), Cong et al. (FPGA 04) –Clark et al. (MICRO 03, HOT CHIPS 04) –Goodwin and Petkov (CASES 03) –Sun et al. (ICCAD 03), Yu et al. (CASES 04) –Many more… This is an NP-hard problem equivalent to the “largest common sub-graph identification” problem Modular Design of Configurable Multiprocessor Systems

Software compilers for configurable /reconfigurable systems

What do we want from our compiler? Make it easy to: –Add instructions to my processor model –Check if my model will meet my requirements (simulation/ profiling) –Optimize the generated code for small size and fast speed –Compile code on my PC to run on my phone (retargetable) Hide the details of anything I don’t care about: –Break the compiler into frond end, middle part, and a backend Modular Design of Configurable Multiprocessor Systems

What toys do we need? Compiler (front-middle-backend), debugger, simulator, profiler, assembler, linker, operating system, FPGA Modular Design of Configurable Multiprocessor Systems

What are some common compilers? GCC (Java, Ada, C, C++, has open-MP, popular, optimizing) LCC (Small code size) Trimaran MIMOLA RECORD CoSy LLVM Modular Design of Configurable Multiprocessor Systems

Multiprocessor complications Modular Design of Configurable Multiprocessor Systems

Configurable Interconnect Design Flow Modular Design of Configurable Multiprocessor Systems

WISHBONE Datasheet WISHBONE specification requires that each component has a datasheet Modular Design of Configurable Multiprocessor Systems Example from WISHBONE B.3

Network Specification Modular Design of Configurable Multiprocessor Systems

Example Interconnect Modular Design of Configurable Multiprocessor Systems

Life looks simple at first Modular Design of Configurable Multiprocessor Systems

But life is complicated Modular Design of Configurable Multiprocessor Systems

Questions? Thank You