University of TEHRAN 1 Nano-Electronic, Nano- Technology By: Shams Mohajerzadeh Thin Film and Nano-electronic Laboratory University of Tehran

University of TEHRAN 2 Outline Vertical Growth of Carbon nanotubes Encapsulation, embedding of CNTs, Field emission transistors, displays Anomalous Anode-cathode behavior, Nanolithography- Writing at nano- scale Nano-porous Silicon structures for light emitting diodes Modeling of field-emission, new concepts

University of TEHRAN 3 Cnt growth chamber

University of TEHRAN 4 Growth of CNT Si substrate, (100) orientation. Ni coating, 2-10nm thickness; 5nm Ni is suitable. Patterning the Ni layer, structured growth, Growth of CNTs is achieved in a plasma-enhanced CVD reactor, A mixture of C 2 H 2 and H 2 is used as the main step. H 2 plasma is used prior to the growth to activate the Ni seed layer and to form nano-sized islands.

University of TEHRAN 5 Patterned structures are feasible

University of TEHRAN 6 Island growth By adding the hydrogen plasma power during the growth it is possible to evacuate the trapped nickel!

University of TEHRAN 7 Island growth, individual Cnts Starting from one small cluster to achieve individual CNTs.

University of TEHRAN 8 Fabrication Process

University of TEHRAN 9 Vertical Growth of CNT using PECVD method

University of TEHRAN 10 Coating the thin layer of TiO2 using CVD 200nm

University of TEHRAN 11 Fabrication Process

University of TEHRAN 12 The final step of fabrication process of Devices

University of TEHRAN 13 Carbon nanotube for transistor fabrication, high current applications

University of TEHRAN 14 The encapsulated CNT by Tio2 and Cr as a gate layer

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University of TEHRAN 16 The theoretical characteristics of device

University of TEHRAN 17 Experimental results of Devices

University of TEHRAN 18 The Electrical behavior of devices in the various A-C distance

University of TEHRAN 19 Electric behavior of device in the large A-C distance

University of TEHRAN 20 The saturation region of devices (a) (b) (c)

University of TEHRAN 21 The Schematic Diagram for definition of Model

University of TEHRAN 22 theoretical and experimental data The Thickness of TiO2 is 100 to 250 nm

University of TEHRAN 23 Schematic Diagram of Self-Define Field Emission Transistor

University of TEHRAN 24 Application In Nanolithography

University of TEHRAN 25 Nano-silicon structures What is nano-crystalline and porous silicon? Conventional fabrication methods Our novel method and Results Light-emitting diodes from as-produced nc-Si Modeling of light-emission: quantum confinement or surface states? Toward silicon laser diodes

University of TEHRAN 26 What is nano-crystalline and porous silicon? Bulk silicon is not a useful material for optoelectronic purposes due to its indirect band-gap. Further integration in electro-optic circuits needs a breakthrough in this obstacle. Porous and Nano-crystalline silicon are the most important and matured ways to give optical capability to silicon A.G. Cullis, et al. J. Appl. Phys. 82(3) 909 (1997)

University of TEHRAN 27 What is nano-crystalline and porous silicon? One can consider (as a simple model) each nano-sized silicon grains as a quantum dot with discrete allowable energy levels. Now a photon can emitted by changing a electron in these levels. There is no K-space and broadening of emission spectra is due to different grain sizes. The main optical transition occurs between the Highest Occupied Molecular Orbital (HOMO) and the Lowest Unoccupied Molecular Orbital (LUMO) Each nano-particle have a HOMO-LUMO gap depends on its size, type and the surface states M.V. Wolkin, Phys. Rev. Lett. 82(1) (1999)

University of TEHRAN 28 Our novel method Fabrication procedure, a sequence of hydrogenation and de-hydrogenation steps

University of TEHRAN 29 Results SEM images Evolution of nc-Si islands with time TiO2 deposition

University of TEHRAN 30 Results TEM images TEM plan-view on nc-Si. Nanometric grians with average size of 3-7 nm is shown TEM Cross-section of prepared sample. Si substrate, nc-Si layer on polycrsytalline TiO 2 top layer is observed.

University of TEHRAN 31 Results Photoluminescence analyses The photoluminescence analyses with Deuterium exciting source (254 nm). The evolution of blue and green emission is observed.

University of TEHRAN 32 Results Cathodoluminescence analysis The Cathodoluminescence analyses of sample B, C and D from Table I. evolution blue, green and red light in different fabrication conditions is observed.

University of TEHRAN 33 Results FTIR There is no significant Si-H and Si-OH bonds in nc-Si layer. So quantum confinement and oxide defects can justify the emission. The last model works for blue emission only so the green and red emission are due to quantum confinement.

University of TEHRAN 34 Results Device electrical characteristics 200 nm The I-V characteristics of samples F1 and F2 from Table I. the sample prepared in 2 W/cm 2 of plasma power shows a dense nc- Si layer and diode-like behavior whereas the one prepared in 4 W/cm 2, has a sparse nc-Si layer and resistor-like behavior.

University of TEHRAN 35 Light-emitting diodes from as-produced nc-Si Schematics of a fabricated LED and an optical image of it, shows emission in almost all of the visible range.

University of TEHRAN 36 Results The energy diagram of fabricated LED. The MOS-like structure is used to increase the carrier injection into active layer and prevent short-circuiting of Si substrate and top metal contact. Energy diagram

University of TEHRAN 37 Hetero-structures with NC Successful fabrication of LEDs is a gateway towards possible optical integration on Si, Lasers?! If a less energetic hydrogenation is experienced, it seems possible to achieve larger and denser distribution of grains A good interface seems possible with a sharp profile, not good for light emitting structures. A wide-gap nano-Si matrix on top of c-Si, a hetero-junction usable for transistor realization. Is high electron mobility device possible using such a configuration?! Sharp and clean interface, no epitaxy?

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University of TEHRAN 39 Thin film transistors on pet Silicon deposition on PET polymers Crystallization by means of an external mechanical stress, hydrogen plasma and thermal treatment. Ultra low temperature nano- crystallization is possible on flexible bases like PET and glass substrates, Fair quality transistors are fabricated and tested. Mobility of the order of 10cm 2 /Vs is obtained.

University of TEHRAN 40 Plastic electronics, stress

University of TEHRAN 41 Metal-Induced Crystallization of Amorphous Silicon (a) SEM image of the laterally grown structures where arrows show the direction of the growth from the central part (seed). (b) The closer view at the seed side, where the grains are very small and the boundary is clear. (c) A higher magnification image of the sample in the laterally grown side. At this side the grains are as large as nm. (a)(b) (c)

University of TEHRAN 42 Lateral growth from patterned Ni seed For the formation of thin film transistors, a lateral crystallization is used where the seed is placed on the source and drain regions of the transistors.

University of TEHRAN 43 The lower curve shows the spectrum of a processed PET substrate without any Si film on it. Also the (111) silicon peak is buried in the huge peak of the partially crystalline PET base and is not observed.

University of TEHRAN 44 The electrical characteristics of transistors Fabrication method, metal induced crystallization of the whole structure. The gate threshold voltage for turning on the transistor was about 22.5 V. The ON/OFF current ratio was about 200 for this device and the presence of the thin metal layer (nickel) could be responsible for the high off current.

University of TEHRAN 45 ELECTRICAL CHARACTERISTICS, MILC (a) The I-V characteristics of transistors using MIC method. (b) The I-V characteristics of transistors using MILC method. An electron mobility of 8- 10cm2/Vs and a threshold voltage of 5 volts are extracted from this data. Also an on/off ratio of 2000 is extracted from the electrical measurement. (a) (b)

University of TEHRAN 46 Summary and conclusion By using carbon nanotubes grown in a vertical fashion one can achieve high frequency and high performance, small transistors, Nano-lithography or even ion-lithography is possible and examined using little structures of CNTs, Field emission modeling is pursued by applying the HMO approximation to the top-carbon atoms Fabrication of light emitting Si-based diodes is possible by a sequential hydrogenation and de- hydrogenation process Realization of far more interesting devices such as hetero-interface transistors and diodes seems possible by the nano-silicon structures. Moderate annealing conditions can be applied onto plastic substrates to achieve thin film transistors with high mobility.

University of TEHRAN 47 Thank you for your attention